Document
74HC238; 74HCT238
3-to-8 line decoder/demultiplexer
Rev. 7 — 2 September 2021
Product data sheet
1. General description
The 74HC238; 74HCT238 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The device features three enable inputs (E1 and E2 and E3). Every output will be LOW unless E1 and E2 are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion to a 1-of-32 (5 to 32 lines) decoder with just four '238 ICs and one inverter. The '238 can be used as an eight output demultiplexer by using one of the active LOW enable inputs as the data input and the remaining enable inputs as strobes. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
2. Features and benefits
• Wide supply voltage range from 2.0 to 6.0 V • CMOS low power dissipation • High noise immunity • Demultiplexing capability • Multiple input enable for easy expansion • Ideal for memory chip select decoding • Active HIGH mutually exclusive outputs • Input levels:
• For 74HC238: CMOS level • For 74HCT238: TTL level • Complies with JEDEC standards • JESD8C (2.7 V to 3.6 V) • JESD7A (2.0 V to 6.0 V) • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B • ESD protection: • HBM JESD22-A114F exceeds 2000 V • MM JESD22-A115-A exceeds 200 V • Multiple package options • Specified from -40 °C to +85 °C and from -40 °C to +125 °C
3. Ordering information
Table 1. Ordering information Type number Package
Temperature range Name
74HC238D
-40 °C to +125 °C SO16
74HCT238D
74HC238PW -40 °C to +125 °C TSSOP16
74HCT238PW
74HC238BQ -40 °C to +125 °C DHVQFN16
74HCT238BQ
Description plastic small outline package; 16 leads; body width 3.9 mm
plastic thin shrink small outline package; 16 leads; body width 4.4 mm
plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 16 terminals; body 2.5 × 3.5 × 0.85 mm
Version SOT109-1
SOT403-1
SOT763-1
Nexperia
4. Functional diagram
A0 1 A1 2 3 TO 8
DECODER A2 3
E1 4 E2 5 E3 6
Fig. 1. Logic symbol
15 Y0 14 Y1 13 Y2 ENABLE 12 Y3 EXITING 11 Y4 10 Y5
9 Y6 7 Y7
001aag752
E1 E2 E3
A0 A1 A2
Fig. 3. Logic diagram
74HC238; 74HCT238
3-to-8 line decoder/demultiplexer
A0 1 A1 2 A2 3
3 TO 8 DECODER
E1 4 E2 5 E3 6
Fig. 2. Functional diagram
ENABLE EXITING
15 Y0 14 Y1 13 Y2 12 Y3 11 Y4 10 Y5
9 Y6 7 Y7
001aag753
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
001aag754
74HC_HCT238
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 2 September 2021
© Nexperia B.V. 2021. All rights reserved
2 / 15
Nexperia
5. Pinning information
74HC238; 74HCT238
3-to-8 line decoder/demultiplexer
5.1. Pinning
74HC238 74HCT238
A0 1 A1 2
16 VCC 15 Y0
A2 3
14 Y1
E1 4
13 Y2
E2 5
12 Y3
E3 6
11 Y4
Y7 7
10 Y5
GND 8
9 Y6
001aag755
Fig. 4. Pin configuration SOT109-1 (SO16) and SOT403-1 (TSSOP16)
74HC238 74HCT238
1 A0 16 VCC
terminal 1 index area
A1 2 A2 3 E1 4 E2 5 E3 6 Y7 7
GND(1)
15 Y0 14 Y1 13 Y2 12 Y3 11 Y4 10 Y5
GND 8 Y6 9
001aag756
Transparent top view
(1) This is not a ground pin. There is no electrical or mechanical requirement to solder the pad. In case soldered, the solder land should remain floating or connected to GND.
Fig. 5. Pin configuration SOT763-1 (DHVQFN16)
5.2. Pin description
Table 2. Pin description Symbol A0, A1, A2 E1, E2 E3 Y0, Y1, Y2, Y3, Y4, Y5, Y6, Y7 GND VCC
Pin 1, 2, 3 4, 5 6 15, 14, 13, 12, 11, 10, 9, 7 8 16
Description address input enable input (active LOW) enable input (active HIGH) output ground (0 V) supply voltage
74HC_HCT238
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 2 September 2021
© Nexperia B.V. 2021. All rights reserved
3 / 15
Nexperia
74HC238; 74HCT238
3-to-8 line decoder/demultiplexer
6. Functional description
Table 3. Function table H = HIGH voltage level; L = LOW voltage level; X = don’t care.
Inputs
Outputs
E1
E2
E3
A0
A1
A2
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
H
X
X
X
X
X
L
L
L
L
L
L
L
L
X
H
X
X
X
X
L
L
L
L
L
L
L
L
X
X
L
X
X
X
L
L
L
L
L
L
L
L
L
L
H
L
L
L
H
L
L
L
L
L
L
L
L
L
H
H
L
L
L
H
L
L
L
L
L
L
L
L
H
L
H
L
L
L
H
L
L
L
L
L
L
L
H
H
H
L
L
L
L
H
L
L
L
L
L
L
H
L
L
H
L
L
L
L
H
L
L
L
L
L
H
H
L
H
L
L
L
L
L
H
L
L
L
L
H
L
H
H
L
L
L
L
L
L
H
L
L
L
H
H
H
H
L
L
L
L
L
L
L
H
7. Limiting values
Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
Max Unit
VCC IIK IOK IO ICC IGND Tstg Ptot
supply voltage input clamping current output clamping current output current supply current ground current storage temperature total power dissipation
VI .