Differential Clock Buffer/Driver DDR400/PC3200-Compliant
CY2SSTV857-32
Differential Clock Buffer/Driver DDR400/PC3200-Compliant
Features
• Operating frequency: 60 MHz to 230 MH...
Description
CY2SSTV857-32
Differential Clock Buffer/Driver DDR400/PC3200-Compliant
Features
Operating frequency: 60 MHz to 230 MHz Supports 400 MHz DDR SDRAM 10 differential outputs from one differential input Spread-Spectrum-compatible Low jitter (cycle-to-cycle): < 75 Very low skew: < 100 ps Power management control input High-impedance outputs when input clock < 20 MHz 2.6V operation Pin-compatible with CDC857-2 and -3 48-pin TSSOP and 40 QFN package Industrial temperature of –40°C to 85°C Conforms to JEDEC DDR specification
Description
The CY2SSTV857-32 is a high-performance, low-skew, low-jitter zero-delay buffer designed to distribute differential clocks in high-speed applications. The CY2SSTV857-32 generates ten differential pair clock outputs from one differential pair clock input. In addition, the CY2SSTV857-32 features differential feedback clock outpts and inputs. This allows the CY2SSTV857-32 to be used as a zero delay buffer.
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