Flash Memory. AT49LV1614A Datasheet

AT49LV1614A Datasheet PDF, Equivalent


Part Number

AT49LV1614A

Description

16-megabit 1M x 16/2M x 8 3-volt Only Flash Memory

Manufacture

ATMEL Corporation

Total Page 26 Pages
PDF Download
Download AT49LV1614A Datasheet PDF


AT49LV1614A Datasheet
Features
Single Voltage Read/Write Operation: 2.65V to 3.3V (BV), 3.0V to 3.6V (LV)
Access Time – 70 ns
Sector Erase Architecture
– Thirty-one 32K Word (64K Bytes) Sectors with Individual Write Lockout
– Eight 4K Word (8K Bytes) Sectors with Individual Write Lockout
Fast Word Program Time – 20 µs
Fast Sector Erase Time – 300 ms
Dual-plane Organization, Permitting Concurrent Read while Program/Erase
Memory Plane A: Eight 4K Word and Seven 32K Word Sectors
Memory Plane B: Twenty-four 32K Word Sectors
Erase Suspend Capability
– Supports Reading/Programming Data from Any Sector by Suspending Erase of
Any Different Sector
Low-power Operation
– 30 mA Active
– 10 µA Standby
Data Polling, Toggle Bit, Ready/Busy for End of Program Detection
VPP Pin for Accelerated Program/Erase Operations
RESET Input for Device Initialization
Sector Lockdown Support
TSOP and CBGA Package Options
Top or Bottom Boot Block Configuration Available
128-bit Protection Register
Description
The AT49BV/LV16X4A(T) is a 2.65- to 3.3-volt 16-megabit Flash memory organized
as 1,048,576 words of 16 bits each or 2,097,152 bytes of 8 bits each. The x16 data
appears on I/O0 - I/O15; the x8 data appears on I/O0 - I/O7. The memory is divided
into 39 sectors for erase operations. The device is offered in 48-lead TSOP and
48-ball CBGA packages. The device has CE and OE control signals to avoid any bus
contention. This device can be read or reprogrammed using a single 2.65V power
supply, making it ideally suited for in-system programming.
Pin Configurations
Pin Name Function
A0 - A19
Addresses
CE Chip Enable
OE Output Enable
WE Write Enable
RESET
Reset
RDY/BUSY READY/BUSY Output
VPP
Power Supply for Accelerated Program/Erase Operations
I/O0 - I/O14 Data Inputs/Outputs
I/O15 (A-1) I/O15 (Data Input/Output, Word Mode) A-1 (LSB Address Input, Byte Mode)
BYTE
Selects Byte or Word Mode
NC No Connect
VCCQ
Output Power Supply
16-megabit
(1M x 16/2M x 8)
3-volt Only
Flash Memory
AT49BV1604A
AT49BV1604AT
AT49BV1614A
AT49LV1614A
AT49BV1614AT
AT49LV1614AT
Rev. 1411F–FLASH–03/02
1

AT49LV1614A Datasheet
TSOP Top View
A15
A14
A13
A12
A11
A10
A9
A8
NC
NC
WE
RESET
VPP
NC
A19
A18
A17
A7
A6
A5
A4
A3
A2
A1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48 A16
47 VCCQ
46 GND
45 I/O15
44 I/O7
43 I/O14
42 I/O6
41 I/O13
40 I/O5
39 I/O12
38 I/O4
37 VCC
36 I/O11
35 I/O3
34 I/O10
33 I/O2
32 I/O9
31 I/O1
30 I/O8
29 I/O0
28 OE
27 GND
26 CE
25 A0
TSOP Top View
Type 1
A15
A14
A13
A12
A11
A10
A9
A8
A19
NC
WE
RESET
VPP*
NC*
RDY/BUSY
A18
A17
A7
A6
A5
A4
A3
A2
A1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48 A16
47 BYTE
46 GND
45 I/O15/A-1
44 I/O7
43 I/O14
42 I/O6
41 I/O13
40 I/O5
39 I/O12
38 I/O4
37 VCC
36 I/O11
35 I/O3
34 I/O10
33 I/O2
32 I/O9
31 I/O1
30 I/O8
29 I/O0
28 OE
27 GND
26 CE
25 A0
AT49BV1604A(T)
AT49BV/LV1614A(T)
CBGA Top View (Ball Down)
1 2 3 4 5 6 78
A
A13 A11 A8 VPP
B
A19 A7 A4
A14 A10 WE RST A18 A17 A5 A2
C
A15 A12 A9
D
A6 A3 A1
A16 I/O14 I/O5 I/O11 I/O2 I/O8 CE A0
E
VCCQ I/O15 I/O6 I/O12 I/O3 I/O9 I/O0 GND
F
GND I/O7 I/O13 I/O4 VCC I/O10 I/O1 OE
CBGA Top View
123456
A
A3 A7 RDY/BUSY WE A9 A13
B
A4 A17 NC* RESET A8 A12
C
A2 A6 A18 VPP* A10 A14
D
A1 A5 NC A19 A11 A15
E
A0 I/O0 I/O2 I/O5 I/O7 A16
F
CE I/O8 I/O10 I/O12 I/O14 BYTE
G
OE I/O9 I/O11 VCC I/O13 I/O15/A-1
H
VSS I/O1 I/O3 I/O4 I/O6 VSS
Note:
*For the AT49BV/LV1614A(T), either pin 13 or pin 14 (TSOP package) or ball B3 or ball C4 (CBGA package) can be connected
to VPP or both pins can be unconnected. Accelerated program/erase operations are only achieved if a voltage of 5V ± 0.5 V or
12V ± 0.5V is applied to pin 13 (TSOP package) or ball C4 (CBGA package).
2 AT49BV1604A(T)/1614A(T)
1411F–FLASH–03/02


Features Datasheet pdf Features • Single Voltage Read/Write O peration: 2.65V to 3.3V (BV), 3.0V to 3 .6V (LV) • Access Time – 70 ns • Sector Erase Architecture • • • • • • • • • • • – Thirty-one 32K Word (64K Bytes) Sectors with Individual Write Lockout – Eigh t 4K Word (8K Bytes) Sectors with Indiv idual Write Lockout Fast Word Program T ime – 20 µs Fast Sector Erase Time 300 ms Dual-plane Organization, Perm itting Concurrent Read while Program/Er ase Memory Plane A: Eight 4K Word and S even 32K Word Sectors Memory Plane B: T wenty-four 32K Word Sectors Erase Suspe nd Capability – Supports Reading/Prog ramming Data from Any Sector by Suspend ing Erase of Any Different Sector Low-p ower Operation – 30 mA Active – 10 µA Standby Data Polling, Toggle Bit, R eady/Busy for End of Program Detection VPP Pin for Accelerated Program/Erase O perations RESET Input for Device Initia lization Sector Lockdown Support TSOP a nd CBGA Package Options Top or Bottom Boot Block Configuration Available 128-bit Protection Register 16-megabi.
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