CONTROL THYRISTOR. AT503S16 Datasheet

AT503S16 Datasheet PDF, Equivalent


Part Number

AT503S16

Description

PHASE CONTROL THYRISTOR

Manufacture

Power Semiconductors

Total Page 4 Pages
PDF Download
Download AT503S16 Datasheet PDF


AT503S16 Datasheet
POSEICO
POSEICO SPA
POwer SEmiconductors Italian COrporation
POSEICO SPA
Via N. Lorenzi 8, 16152 Genova - ITALY
Tel. ++ 39 010 6556234 - Fax ++ 39 010 6557519
Sales Office:
Tel. ++ 39 010 6556775 - Fax ++ 39 010 6442510
PHASE CONTROL THYRISTOR
FINAL SPECIFICATION
gen 03 - ISSUE : 03
AT503
Repetitive voltage up to
Mean on-state current
Surge current
Symbol Characteristic
Conditions
BLOCKING
V RRM
Repetitive peak reverse voltage
V RSM
Non-repetitive peak reverse voltage
V DRM
Repetitive peak off-state voltage
I RRM
Repetitive peak reverse current
V=VRRM
I DRM
Repetitive peak off-state current
V=VDRM
CONDUCTING
I T (AV)
Mean on-state current
180° sin, 50 Hz, Th=55°C, double side cooled
I T (AV)
Mean on-state current
180° sin, 50 Hz, Tc=85°C, double side cooled
I TSM
Surge on-state current
sine wave, 10 ms
I² t I² t
without reverse voltage
V T On-state voltage
On-state current =
800 A
V T(TO)
Threshold voltage
r T On-state slope resistance
SWITCHING
di/dt
Critical rate of rise of on-state current, min.
From 75% VDRM up to 500 A, gate 10V 5ohm
dv/dt
Critical rate of rise of off-state voltage, min.
Linear ramp up to 70% of VDRM
td Gate controlled delay time, typical
VD=100V, gate source 10V, 10 ohm , tr=.5 µs
tq
Circuit commutated turn-off time, typical
dV/dt = 20 V/µs linear up to 75% VDRM
Q rr Reverse recovery charge
di/dt=-20 A/µs, I= 330A
I rr Peak reverse recovery current
VR= 50 V
I H Holding current, typical
VD=5V, gate open circuit
I L Latching current, typical
VD=5V, tp=30µs
GATE
V GT
Gate trigger voltage
VD=5V
I GT Gate trigger current
VD=5V
V GD
Non-trigger gate voltage, min.
VD=VDRM
V FGM
Peak gate voltage (forward)
I FGM
Peak gate current
V RGM
Peak gate voltage (reverse)
P GM
Peak gate power dissipation
Pulse width 100 µs
P G Average gate power dissipation
MOUNTING
R th(j-h)
Thermal impedance, DC
Junction to heatsink, double side cooled
R th(c-h)
Thermal impedance
Case to heatsink, double side cooled
T j Operating junction temperature
F Mounting force
Mass
ORDERING INFORMATION : AT503 S 16
standard specification
VDRM&VRRM/100
1600 V
445 A
6.4 kA
Tj
[°C]
Value
Unit
125 1600
125 1700
125 1600
125 30
125 30
V
V
V
mA
mA
445 A
355 A
125 6.4
kA
205 x1E3 A²s
25 1.45
V
125 0.9
V
125 0.680
mohm
125 200
125 500
25 1.6
200
125
25 300
25 700
A/µs
V/µs
µs
µs
µC
A
mA
mA
25 3.5
25 200
125 0.25
20
8
5
75
1
V
mA
V
V
A
V
W
W
95
20
-30 / 125
4.9 / 5.9
55
°C/kW
°C/kW
°C
kN
g

AT503S16 Datasheet
AT503 PHASE CONTROL THYRISTOR
FINAL SPECIFICATION gen 03 - ISSUE : 03
POSEICO
POSEICO SPA
POwer SEmiconductors Italian COrporation
Th [°C]
130
120
110
100
90
80
70
60
50
0
DISSIPATION CHARACTERISTICS
SQUARE WAVE
30°
60°
90°
120°
180°
DC
100 200 300 400 500 600
IF(AV) [A]
700
PF(AV) [W]
800
700
600
500
400
300
200
100
0
0
120°
90°
180°
60°
30°
DC
100 200 300 400 500 600 700
IF(AV) [A]


Features Datasheet pdf POSEICO POSEICO SPA POwer SEmiconductors Italian COrporation POSEICO SPA Via N . Lorenzi 8, 16152 Genova - ITALY Tel. ++ 39 010 6556234 - Fax ++ 39 010 65575 19 Sales Office: Tel. ++ 39 010 6556775 - Fax ++ 39 010 6442510 PHASE CONTROL THYRISTOR AT503 Repetitive voltage up to Mean on-state current Surge current 1600 V 445 A 6.4 kA FINAL SPECIFICATI ON gen 03 - ISSUE : 03 Symbol Charact eristic Conditions Tj [°C] 125 125 1 25 Value Unit BLOCKING V V V I I RRM RSM DRM RRM DRM Repetitive peak rever se voltage Non-repetitive peak reverse voltage Repetitive peak off-state volta ge Repetitive peak reverse current Repe titive peak off-state current V=VRRM V= VDRM 1600 1700 1600 30 30 V V V mA mA 125 125 CONDUCTING I I I V V r T (AV ) T (AV) TSM Mean on-state current Mea n on-state current Surge on-state curre nt I² t On-state voltage Threshold vol tage On-state slope resistance 180° s in, 50 Hz, Th=55°C, double side cooled 180° sin, 50 Hz, Tc=85°C, double side cooled sine wave, 10 ms with.
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