Document
SDRAM 256Mb E-die (x4, x8, x16)
CMOS SDRAM
256Mb E-die SDRAM Specification
54 TSOP-II with Pb-Free (RoHS compliant)
Revision 1.3 August 2004
* Samsung Electronics reserves the right to change products or specification without notice.
Rev. 1.3 August 2004
SDRAM 256Mb E-die (x4, x8, x16)
Revision History
Revision 1.0 (May. 2003) - First generation for Pb_free products
Revision 1.1 (August. 2003) - Corrected typo in Page #8, 9
Revision 1.2 (May. 2004) - Added Note 5. sentense of tRDL parameter
Revision 1.3 (August. 2004) - Corrected typo.
CMOS SDRAM
Rev. 1.3 August 2004
SDRAM 256Mb E-die (x4, x8, x16)
CMOS SDRAM
16M x 4Bit x 4 Banks / 8M x 8Bit x 4 Banks / 4M x 16Bit x 4 Banks SDRAM
FEATURES
• JEDEC standard 3.3V power supply • LVTTL compatible with multiplexed address • Four banks operation • MRS cycle with address key programs
-. CAS latency (2 & 3) -. Burst length (1, 2, 4, 8 & Full page) -. Burst type (Sequential & Interleave) • All inputs are sampled at the positi.