Voltage Regulator. NCV59800 Datasheet

NCV59800 Regulator. Datasheet pdf. Equivalent

Part NCV59800
Description RF LDO Voltage Regulator
Feature NCV59800 1 A Low Noise, RF LDO Voltage Regulator The NCV59800 is a family of 1 A low−dropout linea.
Manufacture ON Semiconductor
Datasheet
Download NCV59800 Datasheet

NCV59800 1 A Low Noise, RF LDO Voltage Regulator The NCV59 NCV59800 Datasheet
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NCV59800
NCV59800
1 A Low Noise, RF LDO
Voltage Regulator
The NCV59800 is a family of 1 A low−dropout linear regulators
(LDOs) offering high power−supply ripple rejection (PSRR) and
ultra−low output noise. This series of LDOs uses an advanced
BiCMOS process to achieve very good electrical performance. It is an
ideal choice for noise sensitive Analog RF Front−Ends used in
Telecom Equipment. The NCV59800 is available in the 3 mm x 3 mm
DFN8 package.
Features
Operating Input Voltage Range: 2.2 V to 5.5 V
Output Voltage Range:
0.8 V to 5 V (adjustable)
Quiescent Current typ. 60 mA
Low Dropout: 200 mV typ. at 1 A, VOUT = 2.5 V
±2.5% VOUT Accuracy across Load/Line/Temperature
Stable with Small 4.7 mF Ceramic Capacitors
Very−Low Noise: Typically 15 mVRMS/V from 100 Hz to 100 kHz
Over−Current and Thermal Shutdown Protection
Available in 3 x 3 mm DFN8 Package
Device Temperature Grade 1: −40°C to 125°C Ambient Operating
Temperature Range
NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Typical Applications
Telecom Infrastructure
Automotive Infotainment Systems
High−Speed I/F (PLL/VCO)
www.onsemi.com
1
DFN8
3 x 3 mm
CASE 506DB
MARKING DIAGRAM
1
NCVB
59800
ALYWG
G
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb−Free Package
(Note: Microdot may be in either location)
PIN CONNECTIONS
OUT
OUT
FB
GND
IN
IN
NR
EN
NCV59800
(Top View)
3 mm x 3 mm DFN8 0.65 P
VIN
CIN
1 mF
IN
EN
Optional
GND
OUT
FB
NR
R1
10 nF R2
VOUT
COUT
4.7 mF
ORDERING INFORMATION
See detailed ordering and shipping information on page 5 of
this data sheet.
Figure 1. Typical Application Schematics
© Semiconductor Components Industries, LLC, 2016
October, 2016 − Rev. 0
1
Publication Order Number:
NCV59800/D



NCV59800
NCV59800
Figure 2. Internal Block Diagram
Table 1. PIN FUNCTION DESCRIPTION
Pin No. DFN8
Pin Name
Description
7,8 IN Unregulated input supply.
4, EPAD
GND
Ground.
5 EN Driving the enable pin (EN) high turns on the regulator.
Driving this pin low puts the regulator into shutdown mode.
6 NR Connect an external capacitor between this pin and ground to reduce the output noise to very
low levels. The capacitor slows down the VOUT ramp as well (soft−start).
Max recommended CNR value is 0.47 mF
3 FB This pin is the input to the control loop error amplifier and is used to set the output voltage of
the device.
1,2
OUT
Regulator output. A 4.7 mF to 100 mF capacitor is required for stability.
Table 2. ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Input Voltage (Note 1)
IN 6.0 V
Output Voltage
Enable Input Voltage
OUT
EN
−0.3 to (VIN + 0.3) 6.0
−0.3 to 6.0
V
V
FB Input Voltage
FB
−0.3 to 6.0
V
Output Current
IOUT
Internally Limited
mA
Maximum Junction Temperature
TJ(MAX)
150 °C
Operating Ambient Temperature
TA
−40 to +125
°C
Storage Temperature
TSTG
−55 to 150
°C
ESD Capability, Human Body Model (Note 2)
ESDHBM
2000
V
ESD Capability, Machine Model (Note 2)
ESDMM
200 V
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
2. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114)
ESD Machine Model tested per AEC−Q100−003 (EIA/JESD22−A115)
Latchup Current Maximum Rating tested per JEDEC standard: JESD78
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2





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