Base Component. MEC1609 Datasheet

MEC1609 Component. Datasheet pdf. Equivalent

Part MEC1609
Description Mixed Signal Mobile Embedded Flash ARC EC BC-Link/VLPC Base Component
Feature MEC1609/MEC1609i Mixed Signal Mobile Embedded Flash ARC EC BC-Link/ VLPC Base Component Product Fe.
Manufacture Microchip
Download MEC1609 Datasheet

MEC1609/MEC1609i Mixed Signal Mobile Embedded Flash ARC EC MEC1609 Datasheet
MEC1609/MEC1609i Mixed Signal Mobile Embedded Flash ARC EC MEC1609i Datasheet
Recommendation Recommendation Datasheet MEC1609 Datasheet

Mixed Signal Mobile Embedded Flash ARC EC BC-Link/
VLPC Base Component
Product Features
• 3.3V Operation
• ACPI Compliant
• LPC Interface
- LPC I/O and Trusted Cycles Decoded
• VTR (standby) and VBAT (Power Planes)
- Low Standby Current in Sleep Mode
• Configuration Register Set
- Compatible with ISA Plug-and-Play Standard
- EC-Programmable Base Address
• ARC-625D Embedded Controller (EC)
- 16 KB Single Cycle 32-bit Wide Dual-ported
SRAM, Accessible as Closely Coupled Data
Memory and Instruction Memory
- 2 KB Instruction Cache and AHB Memory-
mapped SPI Flash Read Controller
- 32 x 32 x 64 Fast Multiply
- Divide Assist and Saturation Arithmetic
- Maskable Interrupt Aggregator/Accelerator
- Maskable Hardware Wake-Up Events
- Sleep mode
- JTAG Debug Port, Includes JTAG Master
- MCU Serial Debug Port
- 8-Channel DMA Interface Supports SMBus
Controllers and EC/Host GP-SPI Controllers
• Embedded Flash
- 192 KB user space + 2kB info block, 32-bit
Access, 35ns Access Time, 1 K Cycles
- Programmable by LPC, EC and JTAG Inter-
- Flash Security Enhancements
– 4K Boot Block Protection
– Direct JTAG and Direct LPC-protected (2) Pages
at or Near Top of Memory for Password
• Legacy Support
- Fast GATEA20 & Fast CPU_RESET
• System to EC Message Interface
- 8042 Style Host Interface
- Embedded Memory Interface
– Host Serial or Parallel IRQ Source
– Provides Two Windows to On-Chip SRAM for
Host Access
– Two Register Mailbox Command Interface
– Host Access of Virtual Registers Without EC
- Mailbox Registers Interface
– Thirty-two 8-Bit Scratch Registers
– Two Register Mailbox Command Interface
– Two Register SMI Source Interface
- ACPI Embedded Controller Interface
– Four Instances
– 1 or 4 Byte Data transfer capable
- ACPI Power Management Interface
– SCI Event-Generating Functions
• Battery Backed Resources
- Power-Fail Status Register
- 32 KHz Clock Generator
- Week Alarm Timer Interface with Program-
mable Wake-up from 1ms to 45 Days
- VBAT-Powered Control Interface
- VBAT-Backed 64 Byte Memory
• Three EC-based SMBus 2.0 Host Controllers
- Allows Master or Dual Slave Operation
- Controllers are Fully Operational on Standby
- DMA-driven I2C Network Layer Hardware
- I2C Datalink Compatibility Mode
- Multi-Master Capable
- Supports Clock Stretching
- Programmable Bus Speeds
- 400 KHz Capable
- Hardware Bus Access “Fairness” Interface
- SMBus Time-outs Interface
- 8 x 3 x 3 Port Multiplexing
• PECI Interface 2.0
• 18 x 8 Interrupt Capable Multiplexed Keyboard
Scan Matrix
• Three independent Hardware Driven PS/2 Ports
- Fully functional on Main and/or Suspend
- PS/2 Edge Wake Capable
• 115 General Purpose I/O Pins
- 8 GPIO Pass-Through Port (GPTP)
2014 Microchip Technology Inc.
DS00001769A-page 1

• 3-pin LED Interface
- Programmable Blink Rates
- Breathing LED Output
- Operational in EC Sleep State
• Programmable 16-bit Counter/Timer Interface
- Four Wake-capable 16-bit Auto-reloading
Counter/Timer Instances
- Four Operating Modes per Instance: Timer,
One-shot, Event and Measurement.
- 4 External Inputs, 4 External Outputs
• Hibernation Timer Interface
- Two 32.768 KHz Driven Timers
- Programmable Wake-up from 0.5ms to 128
• System Watch Dog Timer (WDT)
• Input Capture and Compare Timer
- 32-bit Free-running timer
- Six 32-bit Capture Registers
- Two 32-bit Compare Registers
- Capture, Compare and Overflow Interrupts
• Microchip’s Multipoint VLPCTM Serial Intercon-
nect Bus Master
- Forwards LPC transactions to VLPC periph-
- Forwards ARC transactions to VLPC periph-
• BC-LinkTM Interconnection Bus
- Three High Speed and one Low Speed Bus
Masters Controllers
• Two General Purpose Serial Peripheral Interface
Controllers (ECGP-SPI)
- One 3-pin EC-driven Full Duplex Serial Com-
munication Interface
- One 4-pin EC/Host-driven Full Duplex Serial
Communication Interface to SPI Flash Inter-
- Flexible Clock Rates
- SPI Burst Capable
• SPI Flash Read Controller
- 4 MB AHB Memory-Mapped address space
- Supports 2 KB EC Instruction Cache
• FAN Support
- 8 Programmable Pulse-Width Modulator Out-
– Multiple Clock Rates
– 16-Bit ‘On’ & 16-Bit ‘Off’ Counters
- Four Fan Tachometer Inputs
- 6 x 2 Capture/Compare Timer Interface
• ADC Interface
- 10-bit Conversion in 10μs
- 16 Channels
- Integral Non-Linearity of ±0.5 LSB; Differen-
tial Non-Linearity of ±0.5 LSB
• Two Pin Debug Port with Standard 16C550A Reg-
ister Interface
- Accessible from Host and EC
- Programmable Input/output Pin Polarity
- Programmable Main Power or Standby
Power Functionality
- Standard Baud Rates to 115.2 Kbps, Custom
Baud Rates to 2 Mbps
• Resistor/Capacitor Identification Detection
- Single Pin Interface to External Inexpensive
RC Circuit
- Replacement for Multiple GPIO’s
- Provides 8 Quantized States on One Pin
• Integrated Standby Power Reset Generator
• Clock Generator
- 32.768 KHz-input Clock
- operational on Suspend Power
- Programmable Clock Power Management
Control & Distribution
- 64.52 MHz ±2% Accuracy
• Packages
- 144 Pin LFBGA RoHS Compliant package
- 144 Pin TFBGA RoHS Compliant package
• Operating Temperature
- The MEC1609 supports the commercial tem-
perature range of 0o C to +70o C
- The MEC1609i supports the industrial tem-
perature range of -40o C to +85o C
DS00001769A-page 2
2014 Microchip Technology Inc.

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