Document
CMOS Digital Integrated Circuits Silicon Monolithic
74HC4066D
74HC4066D
1. Functional Description
• Quad Bilateral Switch
2. General
The 74HC4066D is high-speed CMOS QUAD BILATERAL SWITCH fabricated with silicon gate C2MOS technology. It consists of four independent high speed switches capable of controlling either digital or analog signals while maintaining the CMOS low power dissipation. Control input(C) is provided to control the switch. The switch turns ON while the C input is High, and the switch turns OFF while low. All inputs are equipped with protection circuits against static discharge or transient excess voltage.
3. Features
(1) Wide operating temperature range: Topr = -40 to 125 � (Note 1) (2) Low power dissipation: ICC = 1.0 µA (max) at VCC = 6.0 V, Ta = 25 � (3) High noise immunity: VNIH = VNIL = 28 % VCC (min) (4) Low ON resistance: RON = 50 Ω (typ.) at VCC = 9.0 V, VI/O = VCC or GND (5) High degree of linearity: THD = 0.05 % (typ.) at VCC = 4.5 V
Note 1: Operating Range spec of Topr = -40 � to 125 � is applicable only for the products which manufactured after July 2020.
4. Packaging
SOIC14
©2016-2020
1
Toshiba Electronic Devices & Storage Corporation
Start of commercial production
2020-07
2020-11-24 Rev.2.0
5. Pin Assignment
74HC4066D
6. Marking
7. Truth Table
Control H L
Switch Function On Off
8. System Diagram (per circuit)
©2016-2020
2
Toshiba Electronic Devices & Storage Corporation
2020-11-24 Rev.2.0
9. Absolute Maximum Ratings (Note)
74HC4066D
Characteristics
Symbol Note
Rating
Unit
Supply voltage
VCC
-0.5 to 13.0
V
Input voltage
VIN
-0.5 to VCC + 0.5
V
Switch I/O voltage Input diode current I/O diode current Switch through current VCC/ground current
VI/O
-0.5 to VCC + 0.5
V
IIK
±20
mA
II/OK
±20
mA
IT
±25
mA
ICC
±50
mA
Power dissipation Storage temperature
PD (Note 1)
500
mW
Tstg
-65 to 150
�
Note: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction. Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc).
Note 1: PD derates linearly with -8 mW/� above 85 �.
10. Operating Ranges (Note)
Characteristics
Symbol
Note
Rating
Unit
Supply voltage
VCC
2.0 to 12
V
Input voltage
VIN
0 to VCC
V
Switch I/O voltage Operating temperature Input rise and fall times
VI/O
0 to VCC
V
Topr
(Note 1)
-40 to 125
�
tr,tf
0 to 50
µs
Note: The operating.