SLG7NT4081

SLG7NT4081 PWROK GENERATOR AND STARTUP LATCHING CIRCUIT General Description Silego SLG7NT4081 is a low power and small form device. The SoC is housed in a 2.5mm x 2.5mm TDFN package which is optimal for using with small devices. Features Low Power Consumption 3.3V Supply Voltage RoHS Compliant / Halogen-Free Pb-Free TDFN-12 Package Pin Configuration SLG7NT4081 VDD BC_ACOK_DSW V3.3A_DSW_PWRGD VBAT_MON_DPWROK BC_ACOK PCH_DPWROK_R 1 2 3 4 5 6 TDFN-12 TOP VIEW Output Summary 2 Outputs – Push Pull 2 Outputs – Open Drain 12 VR_ALW_ENABLE 11 SMC_SHUTDOWN 10 STARTUP_LATCH_SET 9 SMC_ONOFF_N 8 PS_ON_SW_N 7 GND Thermal Pad connected to GND Silego Technology, Inc. SLG7NT4081_DS_r103 SLG7NT4081_GP_r005 Rev 1.03 Revised July 30, 2013 Block Diagram SLG7NT4081 PWROK GENERATOR AND STARTUP LATCHING CIRCUIT Typical Application Circuit +V3.3A_DSW C1 100nF U1 1 12 IN IN IN BC_ACOK_DSW. V3.3A_DSW_PWRGD VBAT _MON_DPWROK 2 VDD data I/O 11 3 data I data I/O 10 4 ...