P50N03LD

NIKO-SEM N-Channel Logic Level Enhancement Mode Field Effect Transistor P50N03LD TO-252 (DPAK) D PRODUCT SUMMARY V(BR)DSS RDS(ON) 27 12mΩ ID 50A G S ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS SYMBOL Gate-Source Voltage Continuous Drain Current Pulsed Drain Current1 TC = 25 °C TC = 100 °C Avalanche Current Avalanche Energy L = 0.1mH Repetitive Avalanche Energy2 L = 0.05mH Power Dissipation TC = 25 °C TC = 100 °C Operating Junction & Storage Temperature Range Lead Temperature (1/16” from case for 10 sec.) VGS ID IDM IAR EAS EAR PD Tj, Tstg TL 1. GATE 2. DRAIN 3. SOURCE LIMITS ±20 50 35 150 33 250 8.6 50 30 -55 to 150 275 UNITS V A mJ W °C THERMAL RESISTANCE RATINGS THERMAL RESISTANCE SYMBOL Junction-to-Case RθJC Junction-to-Ambient RθJA Case-to-Heatsink RθCS 1Pulse width limited by maximum junction temperature. 2Duty cycle ≤ 1％ TYPICAL 0.6 MAXIMUM 2.5 62.5 UNITS °C / W ELECTRICAL CHAR...