Secure Memory. DS1855 Datasheet

DS1855 Memory. Datasheet pdf. Equivalent

Part DS1855
Description Dual Nonvolatile Digital Potentiometer and Secure Memory
Feature DS1855 Dual Nonvolatile Digital Potentiometer and Secure Memory FEATURES  Two Linear Taper Potenti.
Manufacture Maxim Integrated
Datasheet
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DS1855 Dual Nonvolatile Digital Potentiometer and Secure Mem DS1855 Datasheet
Recommendation Recommendation Datasheet DS1855 Datasheet




DS1855
DS1855
Dual Nonvolatile Digital Potentiometer
and Secure Memory
FEATURES
Two Linear Taper Potentiometers
DS1855-010 (One 10k, 100 Position
and One 10k, 256 Position)
DS1855-020 (One 10k, 100 Position
and One 20k, 256 Position)
DS1855-050 (One 10k, 100 Position
and One 50k, 256 Position)
DS1855-100 (One 10k, 100 Position
and One 100k, 256 Position)
256 Bytes of EEPROM Memory
Access to Data and Potentiometer Control
via a 2-Wire Interface
External Write-Protect Pin to Protect Data
and Potentiometer Settings
Data and Potentiometer Settings Also Can
Be Write Protected Through Software
Control
Nonvolatile Wiper Storage
Operates from 3V or 5V Supplies
14-Pin TSSOP, 16-Ball CSBGA, and
14-Pin Flip-Chip Packages
Industrial Operating Temperature:
-40ºC to +85ºC
PIN CONFIGURATIONS
SDA
SCL
A0
A1
A2
WP
GND
1
2
3
4
5
6
7
14 Vcc
13 H0
12 W1
11 H1
10 L1
9 W0
8 L0
TSSOP (173 mils)
Top View
A
B
C
D
1234
CSBGA (4mm x 4mm)
Flip Chip (100 mils x 100 mils) (Not Shown)
DESCRIPTION
The DS1855 dual nonvolatile (NV) digital potentiometer and secure memory consists of one 100-position
linear taper potentiometer, one 256-position linear taper potentiometer, 256 bytes of EEPROM memory,
and a 2-wire interface. The DS1855, which features a new software write protect, is an upgrade of the
DS1845. The DS1855 provides an ideal method for setting bias voltages and currents in control
applications using a minimum of circuitry. The EEPROM memory allows a user to store configuration or
calibration data for a specific system or device as well as provide control of the potentiometer wiper
settings. Any type of user information may reside in the first 248 bytes of this memory. The next two
addresses of EEPROM memory are for potentiometer settings and the remaining 6 bytes of memory are
reserved. These reserved and potentiometer registers should not be used for data storage. Access to this
EEPROM is via an industry-standard 2-wire bus. The interface I/O pins consist of SDA and SCL. The
wiper position of the DS1855, as well as EEPROM data, can be write protected through hardware using
the write-protect input pin (WP) or software using the 2-wire interface.
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DS1855
DS1855
PIN DESCRIPTIONS
Name TSSOP BGA
VCC 14
A3
GND 7
SDA 1
D1
B2
SCL 2
A2
WP 6
C1
A0 3
A1
A1 4
A2 5
H0 13
B1
C2
A4
H1 11
L0 8
B3
D3
L1 10
W0 9
C4
D4
W1 12
NC
NC
B4
C3
D2
Description
Power Supply Terminal. The DS1855 will support supply
voltages ranging from +2.7V to +5.5V.
Ground Terminal.
2-Wire serial data interface. The serial data pin is for serial data
transfer to and from the DS1855. The pin is open drain and may
be wire-ORed with other open drain or open collector interfaces.
2-Wire Serial Clock Input. The serial clock input is used to
clock data into the DS1855 on rising edges and clock data out on
falling edges.
Write Protect Input. If set to logic 0, the data in memory and the
potentiometer wiper setting may be changed. If set to logic 1, both
the memory and the potentiometer wiper settings will be write
protected. The WP pin is pulled high internally.
Address Input. Pins A0, A1, and A2 are used to specify the
address of each DS1855 when used in a multi-dropped
configuration. Up to eight DS1855s may be addressed on a single
2-wire bus.
Address Input.
Address Input.
High terminal of Potentiometer 0. For both potentiometers, it is
not required that the high terminal be connected to a potential
greater than the low terminal. Voltage applied to the high terminal
of each potentiometer cannot exceed VCC or go below ground.
High terminal of Potentiometer 1.
Low terminal of Potentiometer 0. For both potentiometers, it is
not required that the low terminal be connected to a potential less
than the high terminal. Voltage applied to the low terminal of each
potentiometer cannot exceed VCC or go below ground.
Low terminal of Potentiometer 1.
Wiper terminal of Pot 0. The wiper position of Potentiometer 0
is determined by the byte at EEPROM memory location F9h.
Voltage applied to the wiper terminal of each potentiometer cannot
exceed the power supply voltage, VCC, or go below ground.
Wiper terminal of Pot 1. The wiper position of Potentiometer 1
is determined by the byte at EEPROM memory location F8h.
No Connect.
No Connect.
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