Flash Microcontroller. AT89C5131 Datasheet

AT89C5131 Datasheet PDF, Equivalent


Part Number

AT89C5131

Description

8-bit Flash Microcontroller

Manufacture

ATMEL Corporation

Total Page 30 Pages
PDF Download
Download AT89C5131 Datasheet PDF


AT89C5131 Datasheet
Features
80C52X2 Core (6 Clocks per Instruction)
– Maximum Core Frequency 48 MHz in X1 Mode, 24MHz in X2 Mode
– Dual Data Pointer
– Full-duplex Enhanced UART (EUART)
– Three 16-bit Timer/Counters: T0, T1 and T2
– 256 Bytes of Scratchpad RAM
32-Kbyte On-chip Flash In-System Programming through USB or UART
4-Kbyte EEPROM for Boot (3-Kbyte) and Data (1-Kbyte)
On-chip Expanded RAM (ERAM): 1024 Bytes
USB 1.1 and 2.0 Full Speed Compliant Module with Interrupt on Transfer Completion
– Endpoint 0 for Control Transfers: 32-byte FIFO
– 6 Programmable Endpoints with In or Out Directions and with Bulk, Interrupt or
Isochronous Transfers
• Endpoint 1, 2, 3: 32-byte FIFO
• Endpoint 4, 5: 2 x 64-byte FIFO with Double Buffering (Ping-pong Mode)
• Endpoint 6: 2 x 512-byte FIFO with Double Buffering (Ping-pong Mode)
– Suspend/Resume Interrupts
– Power-on Reset and USB Bus Reset
– 48 MHz DPLL for Full-speed Bus Operation
– USB Bus Disconnection on Microcontroller Request
5 Channels Programmable Counter Array (PCA) with 16-bit Counter, High-speed
Output, Compare/Capture, PWM and Watchdog Timer Capabilities
Programmable Hardware Watchdog Timer (One-time Enabled with Reset-out): 50 ms to
6s at 4 MHz
Keyboard Interrupt Interface on Port P1 (8 Bits)
TWI (Two Wire Interface) 400Kbit/s
SPI Interface (Master/Slave Mode)
34 I/O Pins
4 Direct-drive LED Outputs with Programmable Current Sources: 2-6-10 mA Typical
4-level Priority Interrupt System (11 sources)
Idle and Power-down Modes
0 to 32 MHz On-chip Oscillator with Analog PLL for 48 MHz Synthesis
Low Power Voltage Range
– 3.0V to 3.6V
– 30 mA Max Operating Current (at 40 MHz)
– 100 µA Max Power-down Current
Industrial Temperature Range
Packages: PLCC52, VQFP64, MLF48, SO28
8-bit Flash
Microcontroller
with Full Speed
USB Device
AT89C5131
Rev. 4136C–USB–04/05

AT89C5131 Datasheet
Description
AT89C5131 is a high-performance Flash version of the 80C51 single-chip 8-bit micro-
controllers with full speed USB functions.
AT89C5131 features a full-speed USB module compatible with the USB specifications
Version 1.1 and 2.0. This module integrates the USB transceivers with a 3.3V voltage
regulator and the Serial Interface Engine (SIE) with Digital Phase Locked Loop and
48 MHz clock recovery. USB Event detection logic (Reset and Suspend/Resume) and
FIFO buffers supporting the mandatory control Endpoint (EP0) and up to 6 versatile
Endpoints (EP1/EP2/EP3/EP4/EP5/EP6) with minimum software overhead are also part
of the USB module.
AT89C5131 retains the features of the Atmel 80C52 with extended Flash capacity (32-
Kbyte), 256 bytes of internal RAM, a 4-level interrupt system, two 16-bit timer/counters
(T0/T1), a full duplex enhanced UART (EUART) and an on-chip oscillator.
In addition, AT89C5131 has an on-chip expanded RAM of 1024 bytes (ERAM), a dual-
data pointer, a 16-bit up/down Timer (T2), a Programmable Counter Array (PCA), up to
4 programmable LED current sources, a programmable hardware watchdog and a
power-on reset.
AT89C5131 has two software-selectable modes of reduced activity for further reduction
in power consumption. In the idle mode the CPU is frozen while the timers, the serial
ports and the interrupt system are still operating. In the power-down mode the RAM is
saved, the peripheral clock is frozen, but the device has full wake-up capability through
USB events or external interrupts.
2 AT89C5131
4136C–USB–04/05


Features Datasheet pdf Features • 80C52X2 Core (6 Clocks per Instruction) – Maximum Core Frequency 48 MHz in X1 Mode, 24MHz in X2 Mode Dual Data Pointer – Full-duplex Enh anced UART (EUART) – Three 16-bit Tim er/Counters: T0, T1 and T2 – 256 Byte s of Scratchpad RAM • 32-Kbyte On-chi p Flash In-System Programming through U SB or UART • 4-Kbyte EEPROM for Boot (3-Kbyte) and Data (1-Kbyte) • On-chi p Expanded RAM (ERAM): 1024 Bytes • U SB 1.1 and 2.0 Full Speed Compliant Mod ule with Interrupt on Transfer Completi on – Endpoint 0 for Control Transfers : 32-byte FIFO – 6 Programmable Endpo ints with In or Out Directions and with Bulk, Interrupt or Isochronous Transfe rs • Endpoint 1, 2, 3: 32-byte FIFO Endpoint 4, 5: 2 x 64-byte FIFO with Double Buffering (Ping-pong Mode) • Endpoint 6: 2 x 512-byte FIFO with Doub le Buffering (Ping-pong Mode) – Suspe nd/Resume Interrupts – Power-on Reset and USB Bus Reset – 48 MHz DPLL for Full-speed Bus Operation – USB Bus Disconnection on Microcont.
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