ESMT
M13S5121632A (2S)
DDR SDRAM
8M x 16 Bit x 4 Banks Double Data Rate SDRAM
Features
Double-data-rate architecture, two data transfers per clock cycle Bi-directional data strobe (DQS)
Differential clock inputs (CLK and CLK ) DLL aligns DQ and DQS transition with CLK transition Four bank operation CAS Latency : 2.5, 3, 4 Burst Type : Seque...
