DDR-II SDRAM. M14D2561616A Datasheet

M14D2561616A SDRAM. Datasheet pdf. Equivalent

Part M14D2561616A
Description DDR-II SDRAM
Feature ESMT DDR II SDRAM (Preliminary) M14D2561616A (2S) 4M x 16 Bit x 4 Banks DDR II SDRAM Features JED.
Manufacture ESMT
Datasheet
Download M14D2561616A Datasheet

ESMT DDR II SDRAM (Preliminary) M14D2561616A (2S) 4M x 16 M14D2561616A Datasheet
Recommendation Recommendation Datasheet M14D2561616A Datasheet




M14D2561616A
ESMT
DDR II SDRAM
(Preliminary)
M14D2561616A (2S)
4M x 16 Bit x 4 Banks
DDR II SDRAM
Features
JEDEC Standard
VDD = 1.8V ± 0.1V, VDDQ = 1.8V ± 0.1V
Internal pipelined double-data-rate architecture; two data access per clock cycle
Bi-directional differential data strobe (DQS, DQS ); DQS can be disabled for single-ended data strobe operation.
On-chip DLL
Differential clock inputs (CLK and CLK )
DLL aligns DQ and DQS transition with CLK transition
1KB page size
- Row address: A0 to A12
- Column address: A0 to A8
Quad bank operation
CAS Latency : 3, 4, 5, 6, 7, 8, 9
Additive Latency: 0, 1, 2, 3, 4, 5, 6, 7
Burst Type : Sequential and Interleave
Burst Length : 4, 8
All inputs except data & DM are sampled at the rising edge of the system clock(CLK)
Data I/O transitions on both edges of data strobe (DQS)
DQS is edge-aligned with data for READ; center-aligned with data for WRITE
Data mask (DM) for write masking only
Off-Chip-Driver (OCD) impedance adjustment
On-Die-Termination for better signal quality
Special function support
- 50/ 75/ 150 ohm ODT
- High Temperature Self refresh rate enable
- DCC (Duty Cycle Corrector)
- Partial Array Self Refresh (PASR)
Auto & Self refresh
Refresh cycle :
- 8192 cycles/64ms (7.8μ s refresh interval) at 0 ℃ ≦ TC ≦ +85
- 8192 cycles/32ms (3.9μ s refresh interval) at +85 ℃ < TC +95
SSTL_18 interface
If tCK < 1.875ns, the device can not support Write with Auto Precharge function.
Elite Semiconductor Memory Technology Inc.
Publication Date : Dec. 2017
Revision : 0.1
1/64



M14D2561616A
ESMT
(Preliminary)
M14D2561616A (2S)
Ordering Information:
Product ID
M14D2561616A -1.5BG2S
M14D2561616A -1.8BG2S
M14D2561616A -2.5BG2S
M14D2561616A -1.8BBG2S
M14D2561616A -2.5BBG2S
Max Freq.
667MHz
533MHz
400MHz
533MHz
400MHz
VDD
1.8V
1.8V
1.8V
1.8V
1.8V
Data Rate
(CL-tRCD-tRP)
Package
Comments
DDR2-1333 (9-10-10)
DDR2-1066 (7-7-7)
DDR2-800 (5-5-5)
84 ball BGA
A(max) = 1.2mm
DDR2-1066 (7-7-7)
84 ball BGA
DDR2-800 (5-5-5)
A(max) = 1.0mm
Pb-free
Functional Block Diagram
Elite Semiconductor Memory Technology Inc.
Publication Date : Dec. 2017
Revision : 0.1
2/64





@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site (Privacy Policy & Contact)