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10/100BASE-TX/FX Transceiver. BCM5221 Datasheet |
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PRELIMINARY DATA SHEET
BCM5221
10/100BASE-TX/FX Mini-Φ™ Transceiver
GENERAL DESCRIPTION
The BCM5221 is a single channel, low-power,
10/100BASE-TX/FX transceiver targeting a number of
applications requiring intelligent power management and
robust network tolerance. The BCM5221 operates at
3.3V or 2.5V. The devices contain a full-duplex 10BASE-
T/100BASE-TX/100BASE-FX Fast Ethernet transceiver,
which performs all of the physical layer interface functions
for 10BASE-T Ethernet on CAT 3, 4, and 5 unshielded
twisted pair (UTP) cable and 100BASE-TX Fast Ethernet
on CAT 5 UTP cable. In addition, layout compatibility with
the previous generation BCM5201 shortens the design
cycle for the BCM5221. 100BASE-FX is supported
through the use of external fiber-optic transmit and
receive devices.
The BCM5221 is a highly integrated solution combining a
digital adaptive equalizer, ADC, phase lock loop, line
driver, encoder, decoder and all the required support
circuitry into a single monolithic CMOS chip. It complies
fully with the IEEE 802.3u specification, including the
Media Independent Interface (MII) and Auto-Negotiation
subsections.
The effective use of digital technology in the BCM5221
design results in robust performance over a broad range
of operating scenarios. Problems inherent to mixed-
signal implementations, such as analog offset and on-
chip noise, are eliminated by employing field proven
digital adaptive equalization and digital clock recovery
techniques.
FEATURES
• Power supply: 2.5V or 3.3V
• Integrated voltage regulator to allow operation from a single
supply source
• Power consumption: <275 mW
• Unique energy detection circuit to enable intelligent power
management
• HP auto-MDIX
• Cable length indication
• Cable noise level indication
• Robust CESD tolerance
• Cable length greater than 140 meters
• Well under 10 PPM defect ratio quality
• +/-10% voltage tolerance
• Industrial temperature range (-40 to 85C)
• MII and RMII configurable
• IEEE 1149.1 (JTAG) scan chain support
• MII management via serial port
• Layout-compatible with BCM5201
• 10BASE-T/100BASE-TX/FX IEEE 802.3u fast Ethernet
transceiver
• Glueless TX-to-FX media conversion
• 64-pin TQFP or 64-pin BGA package
APPLICATIONS
• PCMCIA/CardBus cards
• LAN on motherboard
• IP phones
• Cable modems
• Set-top boxes and print servers
• Wireless access points
• Embedded telecom
TD±
RD±
Auto
MDIX
Multimode
Xmt DAC
Baseline
Wander
Correction
ADC
REF_CLK
XTALO
XTALI
VREF
RDAC
CRS/Link
Detection
Clock
Generator
Bias
Generator
JTAG
5
JTAG
Test Logic
10BASE-T
PCS
Digital
Adaptive
Equalizer
100BASE-X
PCS
Auto-Negotiation
/Link Integrity
Clock
Recovery
LED
Drivers
MII
Registers
MII
Mgmt
Control
4 TXD[3:0]
TXEN
TXER
TXC
COL
RXC
CRS
RXDV
RXER
4 RXD[3:0]
ACTLED#
LNKLED#
SPDLED#
RCVLED#
XMTLED#
MODES
MDC
MDIO
Functional Block Diagram
5221-DS07-R
16215 Alton Parkway • P.O. Box 57013 • Irvine, California 92619-7013 • Phone: 949-450-8700 • Fax: 949-450-8710 11/18/02
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REVISION HISTORY
Revision
5221-DS02-R
5221-DS03-R
5221-DS04-R
5221-DS05-R
5221-DS06-R
5221-DS07-R
Date
2/03/00
4/28/00
6/19/00
02/14/01
05/29/01
11/18/02
Change Description
Initial Release
1. Added BGA pin designations on Table 3.
2. Added BGA Pinout Diagram on page 11.
3. Added Low-Power modes on page 16.
4. Eliminated XTALVDD references from various pages.
5. Added BIASVDD to Table 55 on page 61.
6. Added further explanations to XTALI, XTALO and REF_CLK pins descriptions
to Table 3 on page 6.
Changed Advanced Specifications to Preliminary Specifications.
Minor text changes.
• Deleted CK25 from PHYAD4 - Page 9, 12, and 13.
• Removed TXDAC Power Mode bit from MII register 18h bit 8, Table 7 on
page 19.
• Changed default value of MII Register 1Ah, Table 7 on page 20.
• Added bit 15, FDX LED Enable, to MII register 1Ah, Table 25.
• Changed 0 to MDIX_DIS pin for the default value of MII register 1Ch, bit 11,
in Table 27.
• Fixed several register definitions and moved them to the correct tables.
• Added timing and power values to parameters in Table 40 through Table 57.
• Added Thermal Characteristics section on page 66.
• Updated Table 57, Electrical Characteristics (Supply Current TYP from 95-
110 mA).
• Updated Pin Label descriptions for XTALI/XTALO and ENERGY_DET in
Table 3, on pages 7 and 10 respectively.
• Updated “PHY Identifier Registers” section by changing “00h” to “0h” in the
paragraph under Table 11 on page 26.
• Updated descriptions for LEDs H8 and G8 in Table 3, Pin Descriptions, on
page 10.
• Clarified power-on reset requirement on page 14, 17, and 49.
• Updated Figure 1, ”BCM5221KPB Ballout Diagram,” on page 12.
• Modified description for ”Loopback Mode” on page 14.
• Added ”HP Auto-MDIX” on page 19.
• Modified description for ”MII Register Map Summary” on page 22.
• XTALI Rise/Fall Time has been removed from Table 38 on page 59.
• Updated Table 40 on page 60.
• Added “Reserved” note where applicable, and modified descriptions.
Broadcom Corporation
P.O. Box 57013
16215 Alton Parkway
Irvine, California 92619-7013
© Copyright 2002 by Broadcom Corporation
All rights reserved
Printed in the U.S.A.
Broadcom®, and the pulse logo®, and Connecting Everything™ are trademarks of Broadcom Corporation and/or its
subsidiaries in the United States and certain other countries. All other trademarks are the property of their respective
owners.
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Preliminary Data Sheet
11/18/02
TABLE OF CONTENTS
BCM5221
Section 1: Functional Description...................................................................................... 1
Overview ....................................................................................................................................................... 1
Encoder/Decoder ......................................................................................................................................... 1
Link Monitor.................................................................................................................................................. 2
Carrier Sense ................................................................................................................................................ 2
Collision Detection....................................................................................................................................... 2
Auto-Negotiation .......................................................................................................................................... 2
ADC ............................................................................................................................................................... 3
Digital Clock Recovery/Generator .............................................................................................................. 3
Baseline Wander Correction ....................................................................................................................... 3
Multimode Transmit DAC ............................................................................................................................ 3
Far-End Fault ................................................................................................................................................ 4
RMII Interface................................................................................................................................................ 4
Section 2: Hardware Signal Definitions ............................................................................. 7
Section 3: Pinout Diagram ................................................................................................12
Section 4: Operational Description ..................................................................................14
Reset ........................................................................................................................................................... 14
Isolate Mode ............................................................................................................................................... 14
Super Isolate Mode .................................................................................................................................... 14
Loopback Mode .......................................................................................................................................... 14
Full-Duplex Mode ....................................................................................................................................... 15
100BASE-FX Mode ..................................................................................................................................... 15
10BASE-T Mode ......................................................................................................................................... 15
10BASE-T Serial Mode............................................................................................................................... 16
Special LED Modes .................................................................................................................................... 16
Interrupt Mode ............................................................................................................................................ 17
Energy Detection........................................................................................................................................ 17
Auto Power Down Mode ............................................................................................................................ 18
HP Auto-MDIX ............................................................................................................................................. 19
Document 5221-DS07-R
Broadcom Corporation
Page iii
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