ESD Protection. ESD7462 Datasheet

ESD7462 Protection. Datasheet pdf. Equivalent


msksemi ESD7462
ESD7462, SZESD7462
Ultra-Low Capacitance ESD
Protection
Micro−Packaged Diodes for ESD Protection
The ESD7462 is designed to protect voltage sensitive components
that require ultra−low capacitance from ESD and transient voltage
events. It has industry leading capacitance linearity over voltage
making it ideal for RF applications. This capacitance linearity
combined with the extremely small package and low insertion loss
makes this part well suited for use in antenna line applications for
wireless handsets and terminals.
Features
Industry Leading Capacitance Linearity Over Voltage
Ultra−Low Capacitance: 0.3 pF Typ
Insertion Loss: 0.05 dB at 1 GHz; 0.10 dB at 3 GHz
Low Leakage: < 1 nA Typ
Protection for the following IEC Standards:
IEC61000−4−2 (ESD): Level 4
IEC61000−4−4 (EFT): 40 A −5/50 ns
IEC61000−4−5 (Lightning): 1 A (8/20 ms)
Protection for ISO 10605 (ESD)
SZ Prefix for Automotive and Other Applications Requiring Unique
Site and Control Change Requirements; AEC−Q101 Qualified and
PPAP Capable
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Typical Applications
RF Signal ESD Protection
RF Switching, PA, and Antenna ESD Protection
Near Field Communications
USB 2.0, USB 3.0
MAXIMUM RATINGS (TA = 25°C unless otherwise noted)
Rating
Symbol Value
Unit
IEC 61000−4−2 Contact (Note 1)
IEC 61000−4−2 Air
ISO 10605 Contact (330 pF / 330 W)
ISO 10605 Contact (330 pF / 2 kW)
ISO 10605 Contact (150 pF / 2 kW)
ESD ±18 kV
±18
±13
±29
±30
Total Power Dissipation (Note 2) @ TA = 25°C
Thermal Resistance, Junction−to−Ambient
Junction and Storage Temperature Range
°PD°
RqJA
TJ, Tstg
300
400
−55 to
+150
mW
°C/W
°C
Lead Solder Temperature − Maximum
(10 Second Duration)
TL 260 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Non−repetitive current pulse at TA = 25°C, per IEC61000−4−2 waveform.
2. Mounted with recommended minimum pad size, DC board FR−4
1


ESD7462 Datasheet
Recommendation ESD7462 Datasheet
Part ESD7462
Description Ultra-Low Capacitance ESD Protection
Feature ESD7462; ESD7462, SZESD7462 Ultra-Low Capacitance ESD Protection Micro−Packaged Diodes for ESD Protection Th.
Manufacture msksemi
Datasheet
Download ESD7462 Datasheet




msksemi ESD7462
ELECTRICAL CHARACTERISTICS
(TA = 25°C unless otherwise noted)
Symbol
Parameter
IPP Maximum Reverse Peak Pulse Current
VC Clamping Voltage @ IPP
VRWM Working Peak Reverse Voltage
IR Maximum Reverse Leakage Current @ VRWM
VBR Breakdown Voltage @ IT
IT Test Current
*See Application Note AND8308/D for detailed explanations of
datasheet parameters.
ESD7462, SZESD7462
I
IPP
VC VBR VRWM IIRT IIRT VRWM VBR VC V
IPP
Bi−Directional TVS
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Parameter
Symbol
Condition
Min Typ Max Unit
Reverse Working Voltage
Breakdown Voltage
Reverse Leakage Current
Clamping Voltage
Clamping Voltage, TLP (Note 4)
VRWM
VBR
IR
VC
VC
IT = 1 mA (Note 3)
VRWM = 5 V
IEC 61000−4−2, ±8 kV Contact
IPP = ±8 A
IPP = ±16 A
16
16.5 22
28
100
See Figures 1 and 2
±34
±47
V
V
nA
V
V
Dynamic Resistance
Junction Capacitance
RDYN
CJ
TLP Pulse
VR = 0 V, f = 1 MHz
VR = 0 V, f = 1 GHz
1.6
0.30 0.55
0.25 0.55
W
pF
Insertion Loss
f = 1 GHz
f = 3 GHz
0.05 dB
0.10
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
3. Breakdown voltage is tested from pin 1 to 2 and pin 2 to 1.
4. ANSI/ESD STM5.5.1 − Electrostatic Discharge Sensitivity Testing using Transmission Line Pulse (TLP) Model.
TLP conditions: Z0 = 50 W, tp = 100 ns, tr = 4 ns, averaging window; t1 = 30 ns to t2 = 60 ns.
180
160
140
120
100
80
60
40
20
0
−20
−25
0
25 50 75 100 125 150 175
TIME (ns)
Figure 1. Typical IEC61000−4−2 +8 kV Contact
ESD Clamping Voltage
20
0
−20
−40
−60
−80
−100
−120
−140
−160
−25
0
25 50 75 100 125 150 175
TIME (ns)
Figure 2. Typical IEC61000−4−2 −8 kV Contact
ESD Clamping Voltage



msksemi ESD7462
ESD7462, SZESD7462
TYPICAL CHARACTERISTICS
1.E−03
0.55
1.E−04
0.50 f = 1 MHz
1.E−05
1.E−06
1.E−07
1.E−08
1.E−09
1.E−10
1.E−11
1.E−12
1.E−13
−24
−16
−8 0 8
VOLTAGE (V)
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0
16 24
−10
−6 −2
2
BIAS VOLTAGE (V)
6
10
Figure 3. Typical IV Characteristic Curve
Figure 4. Typical CV Characteristic Curve
1
0
−1
−2
−3
−4
−5
−6
−7
−8
−9
−10
1.E+07
1.E+08
1.E+09
FREQUENCY (Hz)
1.E+10
Figure 5. Typical Insertion Loss
0.55
0.50 VR = 0 V
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0
0.0E+00
1.0E+09
2.0E+09
3.0E+09
FREQUENCY (Hz)
Figure 6. Typical Capacitance Over Frequency







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