~Siliconix .L;II incorporated
VN40AFD
N-Channel Enhancement-Mode MOS Transistor
PRODUCT SUMMARY
V(BR)OSS rOS(ON) (V) ...
~Siliconix .L;II incorporated
VN40AFD
N-Channel Enhancement-Mode MOS
Transistor
PRODUCT SUMMARY
V(BR)OSS rOS(ON) (V) (!l)
10 (A)
40 5 1.14
PACKAGE TO-22080
80 = Side Drain Performance Curves: VNDQ06 (See Section 7)
TO-220SD
TOP VIEW
o
1 SOURCE
2 GATE 3 & TAB - DRAIN
123
ABSOLUTE MAXIMUM RATINGS (Tc = 25°C unless otherwise noted)
PARAMETERS/TEST CONDITIONS
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current Pulsed Drain Current 1
Tc= 25°C Tc = 100°C
Power Dissipation
Tc= 25°C Tc = 100°C
Operating Junction and Storage Temperature
Lead Temperature (1/16" from case for 10 seconds)
SYMBOL Vos VGS ID
10M
Po Tj. Tstg
h
VN40AFD 40 ±30 1.14 0.72 3 15 6
-55 to 150 300
UNITS V A
W °C
THERMAL RESISTANCE
THERMAL RESISTANCE Junction-to-Case
SYMBOL RthJC
1Pulse width limited by maximum junction temperature.
VN40AFD 8.3
UNITS °C/W
6-51
VN40AFD
ELECTRICAL CHARACTERISTICS1
PARAMETER
SYMBOL
TEST CONDITIONS
STATIC
Drain-Source Breakdown Voltage
Gate T...