Motor Controller. TB6572AFG Datasheet

TB6572AFG Controller. Datasheet pdf. Equivalent

TB6572AFG Datasheet
Recommendation TB6572AFG Datasheet
Part TB6572AFG
Description 3-Phase Full-Wave Brushless Motor Controller
Feature TB6572AFG; TOSHIBA Bi- CMOS Integrated Circuit Silicon Monolithic TB6572AFG TB6572AFG 3-Phase Full-Wave Brush.
Manufacture Toshiba
Datasheet
Download TB6572AFG Datasheet




Toshiba TB6572AFG
TOSHIBA Bi- CMOS Integrated Circuit Silicon Monolithic
TB6572AFG
TB6572AFG
3-Phase Full-Wave Brushless Motor Controller
Featuring Speed Control and Sine Wave PWM Drive
The TB6572AFG is a 3-phase full-wave brushless motor
controller IC that employs a sine wave PWM drive mechanism
with a speed control function.
Sine wave current driving with 2-phase modulation enables the
IC to drive a motor with high efficiency and low noise.
It also incorporates a speed control circuit that can vary the
motor speed using to an external clock.
Features
Sine wave PWM drive
2-phase modulation with low switching loss
Triangular wave generator
Dead time function
External clock input
Speed discrimination +PLL speed control circuit
Ready circuit output
FG amplifier
Automatic lead angle correction
Forward/stop/reverse/brake functions
Current limiter
Lock protection
Weight: 0.50 g (typ.)
This product has a MOS structure and is sensitive to electrostatic discharge. When handling this product, ensure that
the environment is protected against electrostatic discharge by using an earth strap, a conductive mat and an ionizer.
Ensure also that the ambient temperature and relative humidity are maintained at reasonable levels.
Pin with low withstand voltage: pin 33
Do not insert devices in the wrong orientation or incorrectly. Otherwise, it may cause the device breakdown, damage
and/or deterioration.
The TB6572AFG is a RoHS-compatible.
About solderability, following conditions were confirmed:
Solderability
(1) Use of Sn-37Pb solder Bath
· solder bath temperature = 230°C
· dipping time = 5 seconds
· the number of times = once
· use of R-type flux
(2) Use of Sn-3.0Ag-0.5Cu solder Bath
· solder bath temperature = 245°C
· dipping time = 5 seconds
· the number of times = once
· use of R-type flux
1
2008-1-21



Toshiba TB6572AFG
TB6572AFG
Block Diagram
Vref1(5 V)
C20
Fref
11
R19
R17 R16
C17
C19 VCO-C
C18 R18
LP1 16
18 17
L3
L2 L1 L4
27 28 26 29
VCO-R
Phase comparator LPF VCO
R15
C16
VDD 31
C15 S-GND
19
5V
C14
R14
25 Td2 24 Td1 36 VCC
8V
R1 C21 HA+ 51
HA52
1/1024 frequency
divider
Automatic
lead angle
Idc
correction
Triangular wave
generator
6 bit (fx/252)
Internal
reference
Charge
pump
C22 HB+ 1
HB2
C23 HC+ 3
HC4
Position
estimation
A/D 5 bit
Counter
Output
waveform
Data
selector
Predriver
R2
Ready
R3 circuit
Frequency
13
Ready
Gain Speed
LP1 Control discriminator
SEL_1 14
SEL_2 15
PLL
Fref
PWM
Ha/Hb/Hc
CW/CCW
120/180
switching
&
gate
block
120°
energization
matrix
Dead
time
setting
Predriver
P-out
+
Protection
& reset
D-out_22
R4
23 21
20
5
R5 C1 R6 FGin+
6 FGin
R9
INTEG-in INTEG-out
R8 C5
C2 C3 R7 C4
7
FGO
12 8 10 9 40
FGS CW START Idc2
/CCW
R10
BRAKE
5V
Lock
protection
t
41
Idc1
30 CLd
C6
Vcc
READY
VCC Bounce
Prevention
Vref1 34
5V
35 Vref1-R
C8 R11 Vcc
P-GND 32
C12 C13
24 V
Vref2
33
C11
CP1
38
37 C10
CP2
39
CP3 C9
LA(U) R20
42
LB(U) R21
45
LC(U) R22
48
Nch
+
M
LA(L) R23
44
Nch
LB(L) R24
47
LC(L) R25
50
43 OUT-A
46 OUT-B
49 OUT-C
R12
C7
R13
2 2008-1-21



Toshiba TB6572AFG
TB6572AFG
Pin Functions
Pin No. Name
Pin Functions
1 HB+ Phase-B hall signal input + pin
2 HBPhase-B hall signal input pin
3 HC+ Phase-C hall signal input + pin
4 HCPhase-C hall signal input pin
5 FGin+ FG amplifier input + pin
6 FGinFG amplifier input pin
7 FGo FG amplifier output pin
8 CW/CCW Forward/reverse switching pin
9 BRAKE Brake
10 START Start
11 Fref External clock input
12 FGS FG hysteresis comparator output pin
13 Ready Ready output pin
14 SEL1 Gain Select 1
15 SEL2 Gain Select 2
16 LP1 For LPF
17 VCO-R Resistor pin for VCO
18 VCO-C Capacitor pin for VCO
19 S-GND Ground pin
20 INTEG-out Integral amp output
21 INTEG-in Integral amp input
22 D-out Speed discriminator deviation output
23 P-out Phase deviation output
24
Td1
Frequency setting pin 1 for internal
reference clock
25
Td2
Frequency setting pin 2 for internal
reference clock
26 L1 Lead angle correction circuit
27 L2 Lead angle correction circuit
28 L3 Lead angle correction circuit
29 L4 Lead angle correction circuit
30 CLd Oscillation pin for lock protection circuit
31 VDD Internal logic power supply pin
32 P-GND Ground pin
33 Vref2 8-V reference power supply
34 Vref1 5-V reference power supply
35 Vref1-R 5-V reference power supply
36 VCC Voltage input pin for control power supply
37 CP2 Charge pump pin
Remarks
Input the positive phase-B Hall device signal.
Input the negative phase-B Hall device signal.
Input the positive phase-C Hall device signal.
Input the negative phase-C Hall device signal.
FG signal input
FG signal input
Pull-up resistor: 50 kΩ (typ.),H: Reverse/L: Forward
Pull-up resistor: 50 kΩ (typ.), L for braking
(all-phase ON for lower circuit)
Pull-up resistor: 50 kΩ (typ.), L for start, H for standby
Pull-up resistor: 50 kΩ (typ.)
Open collector output, IO = 1 mA (max)
Open collector output
Within ±6%: L, Otherwise: High impedance
Selectable from four values. 25-kΩ pull-up resistor (typ.)
Selectable from four values. 25-kΩ pull-up resistor (typ.)
PLL form an external clock
A resistor should be added between this pin and ground.
A capacitor should be added between this pin and ground.
Negative pin
Connect external CR to generate a reference clock.
Connect external CR to generate a reference clock.
Connect an external capacitor.
Connect an external resistor for adjusting the correction
gain.
Connect an external resistor for adjusting the correction
gain.
Connect an external capacitor
A capacitor should be added between this pin and ground
5-V output. A capacitor should be added between this pin
and ground.
8-V output. A capacitor should be added between this pin
and ground.
5-V output. A capacitor should be added between this pin
and ground.
A resistor should be added between VCC and Vref1-R.
VCC (opr.) = 10 to 28 V
For generating upper N-ch FET gate voltage
3 2008-1-21







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