MP5001 Switch Datasheet

MP5001 Datasheet, PDF, Equivalent


Part Number

MP5001

Description

1A - 5A Programmable Current Limit Switch

Manufacture

MPS

Total Page 12 Pages
Datasheet
Download MP5001 Datasheet


MP5001
The Future of Analog IC Technology
MP5001
5V, 1A- 5A Programmable Current
Limit Switch
DESCRIPTION
The MP5001 is a protection device designed to
protect circuitry on the output (source) from
transients on input (VCC). It also protects VCC from
undesired shorts and transients coming from the
source.
At start up, inrush current is limited by limiting the
slew rate at the source. The slew rate is
controlled by a small capacitor at the dv/dt pin.
The dv/dt pin has an internal circuit that allows
the customer to float this pin (no connect) and
still receive a 1.1ms ramp time at the source.
The max load at the output (source) is current
limited. This is accomplished by utilizing a sense
FET topology. The magnitude of the current limit
is controlled by an external resistor from the I-
Limit pin to the Source pin.
An internal charge pump drives the gate of the
power device, allowing a very low on-resistance
DMOS power FET of just 44m.
The source is protected from the VCC input being
too low or too high. Under Voltage Lockout
(UVLO) assures that VCC is above the minimum
operating threshold, before the power device is
turned on. If VCC goes above the high output
threshold, the source voltage will be limited.
FEATURES
Integrated 44mPower FET withstand 20V
Enable/Fault Pin
Adjustable Slew Rate for Output Voltage
Adjustable Current Limit
Thermal Protection
Over Voltage Limit
APPLICATIONS
Hot Swap
PC Cards
Cell Phones
Laptops
“MPS” and “The Future of Analog IC Technology” are Registered Trademarks
of Monolithic Power Systems, Inc.
TYPICAL APPLICATION
VIN
EN
Cdv/dt
RLIMIT
6 N/C
11
VCC Source 5
7 I-Limit
Source 4
MP5001
8 Enable/Fault Source 3
9 dv/dt
Source 2
10 GND
Source 1
VOUT
MP5001 Rev.0.94
9/2/2014
www.MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2014 MPS. All Rights Reserved.
1

MP5001
MP5001 – 5V, 1A- 5A PROGRAMMABLE CURRENT LIMIT SWITCH
Part Number*
MP5001DQ
ORDERING INFORMATION
Package
QFN10 (3x3)
Top Marking
W5
Free Air Temperature (TA)
-40°C to +85°C
* For Tape & Reel, add suffix –Z (e.g. MP5001DQ–Z)
For RoHS Compliant Packaging, add suffix –LF (e.g. MP5001DQ–LF–Z)
PACKAGE REFERENCE
1 10
29
38
47
56
ABSOLUTE MAXIMUM RATINGS (1)
VCC, SOURCE, I-LIMIT ................................22V
dv/dt, ENABLE/FAULT...................................6V
Junction Temperature………….-40°C to +150°C
Continuous Power Dissipation (TA = +25°C)(2)
……………………………………………….2.5W
Storage Temperature............... -65°C to +155°C
Recommended Operating Conditions
Input Voltage Operating Range……….4V to 10V
Operating Junct. Temp (TJ)…….-40°C to +125°C
Thermal Resistance (3) θJA θJC
QFN10....................................50 ...... 12 ...°C/W
Notes:
1) Exceeding these ratings may damage the device.
2) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ(MAX), the junction-to-
ambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by PD(MAX)=(TJ(MAX)-
TA)/ θJA. Exceeding the maximum allowable power dissipation
will cause excessive die temperature, and the regulator will go
into thermal shutdown. Internal thermal shutdown circuitry
protects the device from permanent damage.
3) Measured on JESD51-7 4-layer board.
MP5001 Rev.0.94
9/2/2014
www.MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2014 MPS. All Rights Reserved.
2


Features The Future of Analog IC Technology MP50 01 5V, 1A- 5A Programmable Current Limi t Switch DESCRIPTION The MP5001 is a p rotection device designed to protect ci rcuitry on the output (source) from tra nsients on input (VCC). It also protect s VCC from undesired shorts and transie nts coming from the source. At start up , inrush current is limited by limiting the slew rate at the source. The slew rate is controlled by a small capacitor at the dv/dt pin. The dv/dt pin has an internal circuit that allows the custo mer to float this pin (no connect) and still receive a 1.1ms ramp time at the source. The max load at the output (sou rce) is current limited. This is accomp lished by utilizing a sense FET topolog y. The magnitude of the current limit i s controlled by an external resistor fr om the ILimit pin to the Source pin. An internal charge pump drives the gate o f the power device, allowing a very low on-resistance DMOS power FET of just 4 4mΩ. The source is protected from the VCC input being too low o.
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