R6500-12

R6500/11-/12-/15 '1'Rockwell R6500/11 , R6500/12 and R6500/15 One-Chip Microcomputers SECTION 1 INTRODUCTION 1.1 FEATURES Enhanced 6502 CPU -Four new bit manipulation instructions: Set Memory Bit (SMB) Reset Memory Bit (RMB) Branch on Bit Set (BBS) Branch on Bit Reset (BBR) -Decimal and binary arithmetic modes -13 addressing modes -True indexing 3K-byte mask-programmable ROM (R6500/11, R6500/12) 4K-byte mask-programmable ROM (R6500/15) 192-byte static RAM 32 TIL-compatible 110 lines (R6500/11, R6500/15) 56 TIL-compatible 110 lines (R6500/12) One 8-bit port may be tri-stated under software control One 8-bit port with programmable latched input Two 16-bit programmable counter/timers, with latches -Pulse width measurement -Asymmetrical pulse generation -Pulse generation -Interval timer -Event counter -Retriggerable interval timer Serial port -Full-duplex asynchronous operation mode -Selectable 5- to 8-bit characters -Wake-up feature -Synchronous...