One-Chip Microcomputers. R6500-12 Datasheet

R6500-12 Microcomputers. Datasheet pdf. Equivalent

Part R6500-12
Description One-Chip Microcomputers
Feature R6500/11-/12-/15 '1'Rockwell R6500/11 , R6500/12 and R6500/15 One-Chip Microcomputers SECTION 1 I.
Manufacture Rockwell
Datasheet
Download R6500-12 Datasheet



R6500-12
R6500/11-/12-/15
'1'Rockwell
R6500/11 , R6500/12 and R6500/15
One-Chip Microcomputers
SECTION 1
INTRODUCTION
1.1 FEATURES
• Enhanced 6502 CPU
-Four new bit manipulation instructions:
Set Memory Bit (SMB)
Reset Memory Bit (RMB)
Branch on Bit Set (BBS)
Branch on Bit Reset (BBR)
-Decimal and binary arithmetic modes
-13 addressing modes
-True indexing
• 3K-byte mask-programmable ROM (R6500/11, R6500/12)
• 4K-byte mask-programmable ROM (R6500/15)
• 192-byte static RAM
• 32 TIL-compatible 110 lines (R6500/11, R6500/15)
• 56 TIL-compatible 110 lines (R6500/12)
• One 8-bit port may be tri-stated under software control
• One 8-bit port with programmable latched input
• Two 16-bit programmable counter/timers, with latches
-Pulse width measurement
-Asymmetrical pulse generation
-Pulse generation
-Interval timer
-Event counter
-Retriggerable interval timer
• Serial port
-Full-duplex asynchronous operation mode
-Selectable 5- to 8-bit characters
-Wake-up feature
-Synchronous shift register mode
-Standard programmable bit rates, programmable up to
62.5K bits/sec @ 1 MHz
• Ten interrupts
-Four edge-sensitive lines; two positive, two negative
-Reset
-Non-maskable
-Two counter underflows
-Serial data received
-Serial data transmitted
• Bus expandable to 16K bytes of extemal memory
• Flexible clock circuitry
-2-MHz or I-MHz internal operation
- Internal clock with external 2 MHz to 4 MHz series
resonant XTAL at two or four times internal frequency
- External clock input divided by one, two or four
• 1 pS minimum instruction execution time @ 2 MHz
• NMOS-3 silicon gate, depletion load technology
• Single + 5V power supply
• 12 mW stand-by power for 32 bytes of the 192-byte RAM
• 40-pin DIP (R6500/11 and R6500/15)
• 44-pin PLCC (R6500/11 and R6500/15)
• 64-pin QUIP (R6500/12)
1.2 SUMMARY
These Rockwell microcomputers are complete, high-
performance 8-bit NMOS-3 microcomputers on a single chip,
and are compatible with all members of the R6500 family.
The R6500/11 consists of an enhanced 6502 CPU, an internal
clock oscillator, 3072 bytes of Read-Only Memory, 192 bytess
of Random Access Memory (RAM) and versatile interface cir-
cuitry (Figure 1-1). The interface circuitry includes two 16-bit
programmable timer/counters, 32 bidirectional input/output lines
(including four edge-sensitive lines and input latching on one
8-bit port), a full-duplex serial 110 channel, ten interrupts and
bus expandability.
The R6500/15 is identical to the R6500111 except it has 4K of
ROM.
The innovative architecture and the demonstrated high per-
formance of the R6502 CPU, as well as instruction simplicity,
results in system cost-effectiveness and a wide range of com-
putational power. These features make either device a leading
candidate for microcomputer applications.
The R6500/12 consists of all the features of the R6500/11 plus
three additional 110 ports. It is packaged in a 64 pin QUIP.
To allow prototype circuit development, Rockwell offers a PROM-
compatible 64-pin extended microprocessor device. This device,
the R6511Q, provides all R6500/11 or R6500/15 interface lines,
plus the address bus, data bus and control lines to interface with
external memory. With the addition of external circuits it can also
be used to emulate the R6500/12 (contact Rockwell sales offices
listed on the back page for details).
Document No. 29651N23
Product Description
3-63
Order No. 2119
Rev. 7, June 1987



R6500-12
R6500/11-/12-/15
A backpack emulator, the R65/11 EB, is available for develop-
ing R6500111 applications. No backpack part is available for the
R6500/12.
The R6511Q may also be used as a CPU-RAM-I/O counter
device in multichip systems.
Rockwell supports development of R6500/" single chip micro-
computer applications with the Rockwell Design Center Low Cost
Emulator (LCE) and R65001" Personality Set. Program assembly
can be performed on any user-provided computer using an
assembler generating R6500/" machine code. The machine
code can then be downloaded via an RS-232-C serial channel
to the LCE for program debugging and in-circuit emulation. Com-
plete in-circuit emulation with the R65ocl" Personality Set allows
total system test and evaluation. Refer to the ROC-31 01/2 LCE
and ROC-3XX R6500/" Personality Set data sheets, Order
Nos. ROC17 and ROC06, respectively, for additional information.
This product description is for the reader familiar with the R6502
CPU hardware and programming capabilities. A detailed descrip-
tion of the R6502 CPU hardware is included in the R6500
Microcomputer System Hardware Manual (Order Number 201).
A description of the instruction capabilities of the R6502 CPU
is contained in the R6500 Microcomputer System Programming
Manual (Order Number 202).
One-Chip Microcomputers
1.3 CUSTOMER OPTIONS
The R6500/11 microcomputer is available with the following
customer specified mask options:
• Option 1 Crystal oscillator
• Option 2 Clock divide-by-2 or divide-by-4
• Option 3 Clock MASTER Mode or SLAVE Mode
• Option 4 Port A with or without internal pull-up resistors
• Option 5 Port B with or without internal pull-up resistors
• Option 6 Port C with or without internal pull-up resistors
All options should be specified on an R650C/ll , 112 or 115 order
form.
The R6500/12 is available with all of the above options plus:
• Option 7 Port F with or without internal pull-up resistors
• Option 8 Port G with or without internal pull-up resistors
Refer to the R65001" ROM Code Order Forms (Order Num-
ber 2134) for detail option ordering information.
XTLO r-----~••=~=~~' O·r·=·=~=~~1.______,
XTLI
v'"
Vee
v..
'2
PAO-PA7 (PAD, PA1,
POSITIVE: PA2, PAl
NEGATIVE EDGE DETECTS)
PBD-PB7 (LATCHED INPUTS)
DS(PAO} (INPUT DATA STROBE)·
PCO-PC7/(Ao..A3, A12.
RIW• .1.13, Elm)
PDO-PD7/DATA BUS (DCI-D7)
ADDR BUS 1.1.4-.1.1')
so ("')'
SI(PAl)'
PEO-PE7
1. A8500/11 OR ReSOO/12
2. H6500/15
R&5OD/12
Figure 1-1, R6500/11, R6500112 and R6500115 Interface Signals
-MULTIPLEXED FUNCTION PINS
3-64





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