M12L64164A-5BG2C

ESMT SDRAM FEATURES JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Four banks operation MRS cycle with address key programs - CAS Latency (2 & 3) - Burst Length (1, 2, 4, 8 & full page) - Burst Type (Sequential & Interleave) All inputs are sampled at the positive going edge of the system clock DQM for masking Auto & self refresh 64ms refresh period (4K cycle) - 15.6 µ s refresh interval M12L64164A (2C) 1M x 16 Bit x 4 Banks Synchronous DRAM ORDERING INFORMATION Product ID Max Freq. Package Comments M12L64164A-5TG2C 200MHz 54 TSOP II Pb-free M12L64164A-6TG2C 166MHz 54 TSOP II Pb-free M12L64164A-7TG2C M12L64164A-5BG2C M12L64164A-6BG2C M12L64164A-7BG2C 143MHz 200MHz 166MHz 143MHz 54 TSOP II 54 VBGA 54 VBGA 54 VBGA Pb-free Pb-free Pb-free Pb-free GENERAL DESCRIPTION The M12L64164A is 67,108,864 bits synchronous high data rate Dynamic RAM organized as 4 x 1,048,576 words by 16 bits. Synchronous design allows precise cycle controls with the use of sys...