2M x 16 Bit x 4 Banks Synchronous DRAM
ESMT
SDRAM
FEATURES
JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Four banks operation MRS ...
Description
ESMT
SDRAM
FEATURES
JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Four banks operation MRS cycle with address key programs - CAS Latency ( 2 & 3 ) - Burst Length ( 1, 2, 4, 8 & full page ) - Burst Type ( Sequential & Interleave ) All inputs are sampled at the positive going edge of the system clock Burst Read single write operation DQM for masking Auto & self refresh 64ms refresh period (4K cycle)
M12L128168A (2S)
2M x 16 Bit x 4 Banks
Synchronous DRAM
ORDERING INFORMATION
Product ID
M12L128168A-5TG2S M12L128168A-5BG2S M12L128168A-6TG2S M12L128168A-6BG2S M12L128168A-7TG2S M12L128168A-7BG2S
Max Freq.
Package Comments
200MHz 54 Pin TSOPII Pb-free
200MHz 54 Ball FBGA Pb-free
166MHz 54 Pin TSOPII Pb-free
166MHz 54 Ball FBGA Pb-free
143MHz 54 Pin TSOPII Pb-free
143MHz 54 Ball FBGA Pb-free
GENERAL DESCRIPTION
The M12L128168A is 134,217,728 bits synchronous high data rate Dynamic RAM organized as 4 x 2,097,152 words by 16 bits. Synchronous design allow...
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