853S01

2:1 Differential-to-LVPECL Multiplexer 853S01 Datasheet General Description The 853S01 is a high performance 2:1 Differential-to-LVPECL Multiplexer. The 853S01 can also perform differential translation because the differential inputs accept LVPECL, LVDS and CML levels. The 853S01 is packaged in a small 3mm x 3mm 16 VFQFN package, making it ideal for use on space constrained boards. Features One LVPECL output pair Two selectable differential LVPECL clock inputs PCLKx, nPCLKx pairs can accept the following differential input levels: LVPECL, LVDS, CML Translates LVCMOS/LVTTL input signals to LVPECL levels by using a resistor bias network on nPCLKx, nPCLKx Part-to-part skew: 150ps (maximum) Propagation delay: 490ps (maximum) Full 3.3V or 2.5V operating supply -40°C to 85°C ambient operating temperature Available in lead-free (RoHS 6) packages Block Diagram PCLK0 Pulldown nPCLK0 Pullup/Pulldown PCLK1 Pulldown nPCLK1 Pullup/Pulldown 0 1 CLK_SEL Pu...