9DBL0643

6-output 3.3V LP-HCSL Zero-Delay Buffer with LOS Indicator 9DBL06x3 Datasheet General Description The 9DBL06x3 devices are 3.3V members of IDT's Full-Featured PCIe clock family. They support PCIe Gen1-4 Common Clock (CC) architectures and also support NVLINK applications. The 9DBL06x3 parts have a Loss of Signal (LOS) indicator to support fault-tolerant, high reliability systems. Recommended Application PCIe Gen1-4 and NVLINK clock distribution for Riser Cards, Storage, Networking, JBOD, Communications, Access Points Output Features ▪ Loss Of Signal (LOS) open drain output ▪ 6– 1-200 MHz Low-Power (LP) HCSL DIF pairs ▪ 9DBL0643 default Zout = 100Ω ▪ 9DBL0653 default Zout = 85Ω ▪ Easy AC-coupling to other logic families, see IDT application note AN-891. Key Specifications ▪ PCIe Gen1-4 CC compliant in ZDB or fanout buffer mode ▪ Supports NVLINK at 156.25M in ZDB or fanout buffer mode ▪ DIF cycle-to-cycle jitter <50ps ▪ DIF output-to-output skew < 50ps ▪ Bypas...