9SBV0802 Datasheet | Dual 1:4 Fanout Buffer





9SBV0802 PDF File (Datasheet) Download

Part Number 9SBV0802
Description Dual 1:4 Fanout Buffer
Manufacture IDT
Total Page 11 Pages
PDF Download Download 9SBV0802 PDF File

Features: Dual 1:4 Fanout Buffer with 1.05V Single -Ended Inputs and Outputs 9SBV0802 DAT ASHEET General Description The 9SBV080 2 provides two banks of four 1.05V LVCM OS outputs. Each bank has its own input . There are three OE pins. Two OE pins control two outputs each and one OE pin controls four outputs. One 9SBV0802 al lows one PCH to easily support four CPU 's with point to point routing of the P M signals. Two 9SBV0802's allow one PCH to easily support up to eight CPU's wi th point-to-point routing of the PM sig nals. Recommended Application Fanout bu ffer for PM-SYNC and PM_SYNC CLK in Int el Servers Features/Benefits • 1.8V Power supply, 15mW typical power consum ption; eliminate thermal concerns • O E pins; support 1, 2, 3 or 4 socket sys tems • 1.05V LVCMOS inputs with VREF pin; input thresholds matched to chipse t power supply • Space saving 20-pin 4x4mm VFQFPN; minimal board space Outp ut Features • 8 – 1-48MHz 1.05V LVC MOS outputs Key Specifications • Additive cycle-to-cycle jit.

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Dual 1:4 Fanout Buffer with 1.05V
Single-Ended Inputs and Outputs
9SBV0802
DATASHEET
General Description
The 9SBV0802 provides two banks of four 1.05V LVCMOS
outputs. Each bank has its own input. There are three OE
pins. Two OE pins control two outputs each and one OE pin
controls four outputs. One 9SBV0802 allows one PCH to
easily support four CPU's with point to point routing of the PM
signals. Two 9SBV0802's allow one PCH to easily support up
to eight CPU's with point-to-point routing of the PM signals.
Recommended Application
Fanout buffer for PM-SYNC and PM_SYNC CLK in Intel
Servers
Features/Benefits
1.8V Power supply, 15mW typical power consumption;
eliminate thermal concerns
OE pins; support 1, 2, 3 or 4 socket systems
1.05V LVCMOS inputs with VREF pin; input thresholds
matched to chipset power supply
Space saving 20-pin 4x4mm VFQFPN; minimal board
space
Output Features
8 – 1-48MHz 1.05V LVCMOS outputs
Key Specifications
Additive cycle-to-cycle jitter <8ps
Output-to-output skew within a bank <50ps
Output-to-output skew between banks <100ps
Block Diagram
vOE_07#
vOE_2345#
ICLKA_1.05
ICLKB_1.05
VREF_1.05
vOE_16#
Q_0
Q_7
Q_2
Q_4
Q_3
Q_5
Q_1
Q_6
9SBV0802 DECEMBER 15, 2016
1 ©2016 Integrated Device Technology, Inc.

                    
           






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