2Gb Low Power DDR2 SDRAM
2Gb Low Power DDR2 SDRAM
Rev. 0.5 Jan. ‘16
Revision 0.5 Jan. 2016
1
Document Title 2Gb(128MX16, 64MX32) Low Power DDR...
Description
2Gb Low Power DDR2 SDRAM
Rev. 0.5 Jan. ‘16
Revision 0.5 Jan. 2016
1
Document Title 2Gb(128MX16, 64MX32) Low Power DDR2 SDRAM
Revision History
Revision No.
History
0.0 Initial Draft 0.1 Revised IDD Specification. 0.2 Revised IDD Specification. 0.3 Revised Manufacturer ID (00h F8h) 0.4 Revised IDD Specification, Added Selection Guide and P/N System 0.5 Added Pin Configuration for 134B FBGA x16 PKG
Draft date
Sep. 29th, 2014 Nov. 4th, 2014 Mar. 24th, 2015 May. 22nd, 2015 Jan. 15th, 2016 Jan. 25th, 2016
Remark Preliminary
Rev. 0.5 Jan. ‘16
2
DDR2 Sync DRAM Features
Functionality - VDD2 = 1.14–1.30V - VDDCA/VDDQ = 1.14–1.30V - VDD1 = 1.70–1.95V - Interface : HSUL_12 - Data width : x16 / x32 - Clock frequency range : max 533MHz - Four-bit pre-fetch DDR architecture - Eight internal banks for concurrent operation - Multiplexed, double data rate, command/address inputs; commands entered on every CK edge - Bidirectional/differential data strobe per byte of data(DQS...
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