AND gate. 74HC1G08 Datasheet

74HC1G08 gate. Datasheet pdf. Equivalent

Part 74HC1G08
Description 2-input AND gate
Feature 74HC1G08; 74HCT1G08 2-input AND gate Rev. 5 — 14 March 2018 Product data sheet 1 General descript.
Manufacture nexperia
Datasheet
Download 74HC1G08 Datasheet



74HC1G08
74HC1G08; 74HCT1G08
2-input AND gate
Rev. 5 — 14 March 2018
Product data sheet
1 General description
The 74HC1G08; 74HCT1G08 is a single 2-input AND gate. Inputs include clamp diodes.
This enables the use of current limiting resistors to interface inputs to voltages in excess
of VCC.
2 Features
Input levels:
For 74HC1G08: CMOS level
For 74HCT1G08: TTL level
Symmetrical output impedance
High noise immunity
Low power dissipation
Balanced propagation delays
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from −40 °C to +85 °C and −40 °C to +125 °C
3 Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
74HC1G08GW
-40 °C to +125 °C TSSOP5
74HCT1G08GW
74HC1G08GV
-40 °C to +125 °C SC-74A
74HCT1G08GV
Description
plastic thin shrink small outline package; 5 leads;
body width 1.25 mm
plastic surface-mounted package; 5 leads
Version
SOT353-1
SOT753



74HC1G08
Nexperia
74HC1G08; 74HCT1G08
2-input AND gate
4 Marking
Table 2. Marking codes
Type number
74HC1G08GW
74HCT1G08GW
74HC1G08GV
74HCT1G08GV
5 Functional diagram
1B
2A
Figure 1.  Logic symbol
Y4
mna113
B
Figure 3.  Logic diagram
A
6 Pinning information
Marking
HE
TE
H08
T08
1
&
2
mna114
Figure 2.  IEC logic symbol
4
Y
mna115
6.1 Pinning
Figure 4.  Pin configuration
74HC1G08
74HCT1G08
B1
A2
5 VCC
GND 3
4Y
001aaf102
74HC_HCT1G08
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 14 March 2018
© Nexperia B.V. 2018. All rights reserved.
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