CLOCK GENERATOR. Si50122-A4 Datasheet

Si50122-A4 GENERATOR. Datasheet pdf. Equivalent

Part Si50122-A4
Description CLOCK GENERATOR
Feature Si50122-A3/A4 CRYSTAL-LESS PCI-EXPRESS GEN 1 & GEN 2 DUAL OUTPUT CLOCK GENERATOR forNotNeRwecDoesm.
Manufacture Silicon Laboratories
Datasheet
Download Si50122-A4 Datasheet



Si50122-A4
Si50122-A3/A4
CRYSTAL-LESS PCI-EXPRESS GEN 1 & GEN 2
DUAL OUTPUT CLOCK GENERATOR
Features
Crystal-less clock generator with Triangular spread spectrum
integrated CMEMS
profile for maximum EMI
PCI-Express Gen 1/2 compliant reduction (Si50122-A4)
Two PCIe 100 MHz differential Industrial Temperature –40 to
HCSL outputs
85 °C
One 25 MHz single-ended
2.5 V, 3.3 V Power supply
LVCMOS output
Small package 10-pin TDFN
Supports Serial (ATA) at
(2.0x2.5 mm)
100 MHz
Si50122-A3 does not support
Low power differential output
spread spectrum outputs
buffers
Si50122-A4 supports 0.5% down
No termination resistors required spread outputs
for differential output clocks
Applications
Digital TV
Set top box
Solid State Drives (SSD)
Wireless Access Point
Home Gateway
Network Attached Storage
Multi-function Printer
Wireless Access Point
Digital Video Cameras
Description
Ordering Information:
See page 10
Pin Assignments
VSS 1
REFOUT 2
NC 3
DIFF1 4
DIFF1 5
10 VDD
9 VDD
8 DIFF2
7 DIFF2
6 VSS
Si50122-A3/A4 is a high performance, crystal-less PCIe clock generator
that can generate two 100 MHz PCIe clock and one 25 MHz LVCMOS
clock outputs. The differential clock outputs are compliant to PCIe Gen1
and Gen 2 specifications. The ultra-small footprint (2.0x2.5 mm) and
industry leading low power consumption make Si50122-A3/A4 the ideal
clock solution for consumer and embedded applications where board
space is limited and low power is needed.
Patents pending
Functional Block Diagram
CMEMS
VDD
PLL 
(SSC)
Divider
REFOUT
DIFF1
DIFF2
Rev 0.7 9/14
VSS
Copyright © 2014 by Silicon Laboratories
Si50122-A3/A4



Si50122-A4
Si50122-A3/A4
2 Rev 0.7





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