16Gb M-die. M393ABG40M5B Datasheet

M393ABG40M5B M-die. Datasheet pdf. Equivalent

Part M393ABG40M5B
Description 288pin Registered DIMM based on 16Gb M-die
Feature Rev. 1.0, Feb. 2019 M393ABG40M5B 288pin Registered DIMM based on 16Gb M-die 78FBGA with Lead-Free & .
Manufacture Samsung
Datasheet
Download M393ABG40M5B Datasheet



M393ABG40M5B
Rev. 1.0, Feb. 2019
M393ABG40M5B
288pin Registered DIMM
based on 16Gb M-die
78FBGA with Lead-Free & Halogen-Free
(RoHS compliant)
datasheet
SAMSUNG ELECTRONICS RESERVES THE RIGHT TO CHANGE PRODUCTS, INFORMATION AND
SPECIFICATIONS WITHOUT NOTICE.
Products and specifications discussed herein are for reference purposes only. All information discussed
herein is provided on an "AS IS" basis, without warranties of any kind.
This document and all information discussed herein remain the sole and exclusive property of Samsung
Electronics. No license of any patent, copyright, mask work, trademark or any other intellectual property
right is granted by one party to the other party under this document, by implication, estoppel or other-
wise.
Samsung products are not intended for use in life support, critical care, medical, safety equipment, or
similar applications where product failure could result in loss of life or personal or physical harm, or any
military or defense application, or any governmental procurement to which special terms or provisions
may apply.
For updates or additional information about Samsung products, contact your nearest Samsung office.
All brand names, trademarks and registered trademarks belong to their respective owners.
© 2019 Samsung Electronics Co., Ltd. All rights reserved.
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M393ABG40M5B
Registered DIMM
datasheet
Revision History
Revision No.
0.0
History
- First version for target specification.
Draft Date
21st Sep, 2018
1.0 - Final datasheet.
21st Feb, 2019
- Update IDD table
1. Update IDD and IPP values.
2. Remove symbol IDD5B2, IDD5F3, IDD5F5, IPP5B2, IPP5F3 and
IPP5F5.
- Update speed bins table.
- Add Timings used for IDD, IPP and IDDQ Measurement-Loop Pat-
terns table.
- Update Basic IDD, IPP and IDDQ Measurement Conditions table.
1. Correct typo.
2. Remove IDD4RB/IDDQ4RB/IDD4WB.
3. Add IDD5B2/IPP5B2/IDD5F3/IPP5F3/IDD5F5/IPP5F5 parame-
ters.
- Update DDR4-2933 Speed Bins and Operations table.
- Correct CAS latency in Key features.
Rev. 1.0
DDR4 SDRAM
Remark
Target
Final
Editor
T.Y.Lee
J.Y.Bae
T.Y.Lee
J.Y.Bae
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