Low-power inverter
74AUP1G04
Low-power inverter
Rev. 11 — 13 January 2022
Product data sheet
1. General description
The 74AUP1G04 is a si...
Description
74AUP1G04
Low-power inverter
Rev. 11 — 13 January 2022
Product data sheet
1. General description
The 74AUP1G04 is a single inverter.
Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.
This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.
This device is fully specified for partial Power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.
2. Features and benefits
Wide supply voltage range from 0.8 V to 3.6 V CMOS low power dissipation High noise immunity Complies with JEDEC standards:
JESD8-12 (0.8 V to 1.3 V) JESD8-11 (0.9 V to 1.65 V) JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8C (2.7 V to 3.6 V) ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 Class 3A exceeds 5000 V CDM: ANSI/ESDA/JEDEC JS-002 Class C3 exceeds 1000 V MM: JESD22-A115-A exceeds 200 V Low static power consumption; ICC = 0.9 μA (maximum) Latch-up performance exceeds 100 mA per JESD 78B Class II Overvoltage tolerant inputs to 3.6 V Low noise overshoot and undershoot < 10 % of VCC IOFF circuitry provides partial Power-down mode operation Multiple package options Specified from -40 °C to +85 °C and -40 °C to +125 °C
Nexperia
74AUP1G04
Low-power inverter
3. Ordering information
Table 1. Ordering informa...
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