DatasheetsPDF.com

74AUP1G34 Dataheets PDF



Part Number 74AUP1G34
Manufacturers nexperia
Logo nexperia
Description Low-power buffer
Datasheet 74AUP1G34 Datasheet74AUP1G34 Datasheet (PDF)

74AUP1G34 Low-power buffer Rev. 10 — 20 January 2022 Product data sheet 1. General description The 74AUP1G34 is a single buffer. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damagin.

  74AUP1G34   74AUP1G34


Document
74AUP1G34 Low-power buffer Rev. 10 — 20 January 2022 Product data sheet 1. General description The 74AUP1G34 is a single buffer. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. 2. Features and benefits • Wide supply voltage range from 0.8 V to 3.6 V • CMOS low power dissipation • High noise immunity • Overvoltage tolerant inputs to 3.6 V • Low noise overshoot and undershoot < 10 % of VCC • IOFF circuitry provides partial power-down mode operation • Latch-up performance exceeds 100 mA per JESD 78 Class II • Low static power consumption; ICC = 0.9 μA (maximum) • Complies with JEDEC standards: • JESD8-12 (0.8 V to 1.3 V) • JESD8-11 (0.9 V to 1.65 V) • JESD8-7 (1.65 V to 1.95 V) • JESD8-5 (2.3 V to 2.7 V) • JESD8C (2.7 V to 3.6 V) • ESD protection: • HBM: ANSI/ESDA/JEDEC JS-001 Class 3A exceeds 5000 V • CDM: ANSI/ESDA/JEDEC JS-002 Class C3 exceeds 1000 V • MM: JESD22-A115-A exceeds 200 V • Multiple package options • Specified from -40 °C to +85 °C and -40 °C to +125 °C Nexperia 74AUP1G34 Low-power buffer 3. Ordering information Table 1. Ordering information Type number Package Temperature range 74AUP1G34GW -40 °C to +125 °C Name TSSOP5 74AUP1G34GM -40 °C to +125 °C XSON6 74AUP1G34GN -40 °C to +125 °C XSON6 74AUP1G34GS -40 °C to +125 °C XSON6 74AUP1G34GX -40 °C to +125 °C X2SON5 74AUP1G34GX4 -40 °C to +125 °C X2SON4 Description Version plastic thin shrink small outline package; 5 leads; body width 1.25 mm SOT353-1 plastic extremely thin small outline package; no leads; SOT886 6 terminals; body 1 × 1.45 × 0.5 mm extremely thin small outline package; no leads; 6 terminals; body 0.9 × 1.0 × 0.35 mm SOT1115 extremely thin small outline package; no leads; 6 terminals; body 1.0 × 1.0 × 0.35 mm SOT1202 plastic thermal enhanced extremely thin small outline package; no leads; 5 terminals; body 0.8 × 0.8 × 0.32 mm SOT1226-3 plastic thermal enhanced extremely thin small outline package; no leads; 4 terminals; body 0.6 × 0.6 × 0.32 mm SOT1269-2 4. Marking Table 2. Marking Type number 74AUP1G34GW 74AUP1G34GM 74AUP1G34GN 74AUP1G34GS 74AUP1G34GX 74AUP1G34GX4 Marking code[1] aN aN aN aN aN aN [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram A Y 001aac538 Fig. 1. Logic symbol 001aac537 Fig. 2. IEC logic symbol A Y 001aac536 Fig. 3. Logic diagram 74AUP1G34 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 10 — 20 January 2022 © Nexperia B.V. 2022. All rights reserved 2 / 19 Nexperia 6. Pinning information 74AUP1G34 Low-power buffer 6.1. Pinning 74AUP1G34 n.c. 1 A2 5 VCC GND 3 4Y 001aac535 Fig. 4. Pin configuration SOT353-1 (TSSOP5) 74AUP1G34 n.c. 1 3 GND 5 VCC A2 4Y aaa-003005 Transparent top view Fig. 6. Pin configuration SOT1226-3 (X2SON5) 74AUP1G34 n.c. 1 6 VCC A2 5 n.c. GND 3 4Y 001aaf032 Transparent top view Fig. 5. Pin configuration SOT886, SOT1115 and SOT1202 (XSON6) 74AUP1G34 A1 4 VCC GND 2 3Y aaa-028398 Transparent top view Fig. 7. Pin configuration SOT1269-2 (X2SON4) 6.2. Pin description Table 3. Pin description Symbol Pin TSSOP5 and X2SON5 XSON6 n.c. 1 1 A 2 2 GND 3 3 Y 4 4 n.c. - 5 VCC 5 6 X2SON4 1 2 3 4 7. Functional description Table 4. Function table H = HIGH voltage level; L = LOW voltage level. Input A L H Output Y L H Description not connected data input ground (0 V) data output not connected supply voltage 74AUP1G34 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 10 — 20 January 2022 © Nexperia B.V. 2022. All rights reserved 3 / 19 Nexperia 74AUP1G34 Low-power buffer 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit VCC IIK VI IOK VO IO ICC IGND Tstg Ptot supply voltage input clamping current input voltage output clamping current output voltage output current supply current ground current storage temperature total power dissipation -0.5 VI < 0 V -50 [1] -0.5 VO < 0 V -50 Active mode and Power-down mode [1] -0.5 VO = 0 V to VCC - - -50 -65 Tamb = -40 °C to +125 °C TSSOP5, XSON6 and X2SON5 package [2] - +4.6 V - mA +4.6 V - mA +4.6 V ±20 mA +50 mA - mA +150 °C 250 mW X2SON4 package [3] - 150 mW [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed..


74LVC1G17 74AUP1G34 74LVC1G14


@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site.
(Privacy Policy & Contact)