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NDD58P Dataheets PDF



Part Number NDD58P
Manufacturers INSIGNIS
Logo INSIGNIS
Description 64M x 8 bit DDR Synchronous DRAM
Datasheet NDD58P DatasheetNDD58P Datasheet (PDF)

512Mb (x16, x8) - DDR Synchronous DRAM 32M x 16 bit or 64M x 8 bit DDR Synchronous DRAM Overview The 512Mb DDR SDRAM is a high-speed CMOS double data rate synchronous DRAM containing 512 Mbits. It is internally configured as a quad 8M x 16 or 16M x 8 DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal, CK). Data outputs occur at both rising edges of CK and Read and write accesses to the SDRAM are burst oriented; accesses start at a selected loca.

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512Mb (x16, x8) - DDR Synchronous DRAM 32M x 16 bit or 64M x 8 bit DDR Synchronous DRAM Overview The 512Mb DDR SDRAM is a high-speed CMOS double data rate synchronous DRAM containing 512 Mbits. It is internally configured as a quad 8M x 16 or 16M x 8 DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal, CK). Data outputs occur at both rising edges of CK and Read and write accesses to the SDRAM are burst oriented; accesses start at a selected location and continue for a programmed number of locations in a programmed sequence. Accesses begin with the registration of a BankActivate command which is then followed by a Read or Write command. The device provides programmable Read or Write burst lengths of 2, 4, or 8. An auto precharge function may be enabled to provide a self-timed row precharge that is initiated at the end of the burst sequence. The refresh functions, either Auto or Self Refresh are easy to use. In addition, 512Mb DDR SDRAM .


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