LS1088A

NXP Semiconductors Data Sheet: Technical Data QorIQ LS1088A Data Sheet Features LS1088A contains eight ARM® Cortex®-A53 (32/64 bit) cores with the following capabilities: – Speed up to 1.6 GHz – Arranged as two clusters of four cores – 32 KB L1 instruction cache (ECC protection) and 32 KB L1 data cache (ECC protection) – Two 1 MB unified I/D L2 cache (ECC protection), one per Cortex-A53 core cluster – NEON™ SIMD coprocessor – ARMv8 cryptography extensions Hierarchical interconnect fabric: – Hardware-managed data coherency – Up to 700 MHz operation One 32/64-bit DDR4 SDRAM memory controller: – ECC and interleaving support – Up to 2.1 GT/s Datapath acceleration architecture 2.0 (DPAA2) incorporates acceleration for the following functions: – Packet parsing, classification, and distribution (WRIOP) – Queue management for scheduling, packet sequencing, and congestion management (QMan) – Hardware buffer management for buffer allocation and de-al...