Document
74AUP1T08
Low-power 2-input AND gate with voltage-level translator
Rev. 3 — 25 January 2022
Product data sheet
1. General description
The 74AUP1T08 provides the single 2-input AND function. This device ensures a very low static and dynamic power consumption across the entire VCC range from 2.3 V to 3.6 V.
The 74AUP1T08 is designed for logic-level translation applications with input switching levels that accept 1.8 V low-voltage CMOS signals, while operating from either a single 2.5 V or 3.3 V supply voltage.
The wide supply voltage range ensures normal operation as battery voltage drops from 3.6 V to 2.3 V.
This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.
Schmitt trigger inputs make the circuit tolerant to slower input rise and fall times across the entire VCC range.
2. Features and benefits
• Wide supply voltage range from 2.3 V to 3.6 V • High noise immunity • ESD protection:
• HBM JESD22-A114F Class 3A exceeds 5000 V • CDM JESD22-C101E exceeds 1000 V • Low static power consumption; ICC = 1.5 μA (maximum) • Latch-up performance exceeds 100 mA per JESD 78 Class II • Inputs accept voltages up to 3.6 V • Low noise overshoot and undershoot < 10 % of VCC • IOFF circuitry provides partial power-down mode operation • Specified from -40 °C to +85 °C and -40 °C to +125 °C
3. Ordering information
Table 1. Ordering information Type number Package
Temperature range Name 74AUP1T08GW -40 °C to +125 °C TSSOP5
74AUP1T08GX -40 °C to +125 °C X2SON5
Description
plastic thin shrink small outline package; 5 leads; body width 1.25 mm
plastic thermal enhanced extremely thin small outline package; no leads; 5 terminals; body 0.8 × 0.8 × 0.32 mm
Version SOT353-1
SOT1226-3
Nexperia
74AUP1T08
Low-power 2-input AND gate with voltage-level translator
4. Marking
Table 2. Marking Type number 74AUP1T08GW 74AUP1T08GX
Marking code[1] 5J 5J
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
1B 2A
Y4
aaa-027689
Fig. 1. Logic symbol
1
&
4
2
aaa-027690
Fig. 2. IEC logic symbol
B
A
Fig. 3. Logic diagram
Y aaa-027691
6. Pinning information
6.1. Pinning
74AUP1T08
B1 A2
5 VCC
GND 3
4Y
aaa-027693
Fig. 4. Pin configuration SOT353-1 (TSSOP5)
74AUP1T08
B1
3 GND
5 VCC
A2
4Y
aaa-027694 Transparent top view
Fig. 5. Pin configuration SOT1226-3 (X2SON5)
6.2. Pin description
Table 3. Pin description
Symbol
Pin
B
1
A
2
GND
3
Y
4
VCC
5
Description data input data input ground (0 V) data output supply voltage
74AUP1T08
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 25 January 2022
© Nexperia B.V. 2022. All rights reserved
2 / 14
Nexperia
74AUP1T08
Low-power 2-input AND gate with voltage-level translator
7. Functional description
Table 4. Function table H = HIGH voltage level; L = LOW voltage level.
Input
A
B
L
L
L
H
H
L
H
H
Output Y L L L H
8. Limiting values
Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
Max Unit
VCC IIK VI IOK VO IO ICC IGND Tstg Ptot
supply voltage input clamping current input voltage output clamping current output voltage output current supply current ground current storage temperature total power dissipation
VI < 0 V VO < 0 V Active mode and Power-down mode VO = 0 V to VCC
Tamb = -40 °C to +125 °C
-0.5
-50
[1] -0.5
-50
[1] -0.5
-
-
-50
-65
[2]
-
+4.6 V
-
mA
+4.6 V
-
mA
+4.6 V
±20 mA
50 mA
-
mA
+150 °C
250 mW
[1] The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] For SOT353-1 (TSSOP5) package: Ptot derates linearly with 3.3 mW/K above 74 °C.
For SOT1226-3 (X2SON5) package: Ptot derates linearly with 3.0 mW/K above 67 °C.
9. Recommended operating conditions
Table 6. Recommended operating conditions Symbol Parameter
VCC
supply voltage
VI
input voltage
VO
output voltage
Tamb
ambient temperature
Conditions
Active mode Power-down mode; VCC = 0 V
Min
Max Unit
2.3
3.6 V
0
3.6 V
0
VCC V
0
3.6 V
-40
+125 °C
74AUP1T08
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 25 January 2022
© Nexperia B.V. 2022. All rights reserved
3 / 14
Nexperia
74AUP1T08
Low-power 2-input AND gate with voltage-level translator
10. Static characteristics
Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
Typ
Tamb = 25 °C
VT+
positive-going threshold
voltage
VT-
negative-going threshold
voltage
VH
hysteresis voltage
VOH
HIGH-level output voltage
VOL
LOW-level .