GS8160Z36DGT-333

GS8160Z18/36DGT-400/375/333/250/200/150 100-Pin TQFP Commercial Temp Industrial Temp 18Mb Pipelined and Flow Through Synchronous NBT SRAMs 400 MHz–150 MHz 2.5 V or 3.3 V VDD 2.5 V or 3.3 V I/O Features NBT (No Bus Turn Around) functionality allows zero wait read-write-read bus utilization; Fully pin-compatible with both pipelined and flow through NtRAM™, NoBL™ and ZBT™ SRAMs 2.5 V or 3.3 V +10%/–10% core power supply 2.5 V or 3.3 V I/O supply User-configurable Pipeline and Flow Through mode LBO pin for Linear or Interleave Burst mode Pin compatible with 2Mb, 4Mb, 8Mb, 36Mb, 72Mb and 144Mb devices Byte write operation (9-bit Bytes) 3 chip enable signals for easy depth expansion ZZ Pin for automatic power-down RoHS-compliant 100-lead TQFP package available Functional Description The GS8160Z18/36DGT is an 18Mbit Synchronous Static SRAM. GSI's NBT SRAMs, like ZBT, NtRAM, NoBL or other pipelined read/double late write or flow through read/ single late write SRAMs, allow utilization of all available bus bandwidth by eliminating the need to insert deselect cycles when the device is switched from read to write cycles. Because it is a synchronous device, address, data inputs, and read/ write control inputs are captured on the rising edge of the input clock. Burst order control (LBO) must be tied to a power rail for proper operation. Asynchronous inputs include the Sleep mode enable (ZZ) and Output Enable. Output Enable can be used to override the synchronous c...