36Mb SigmaQuad-II Burst of 2 SRAM
GS8342Q08/09/18/36AE-278/250/200/167
165-Bump BGA Commercial Temp Industrial Temp
36Mb SigmaQuad-II Burst of 2 SRAM
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Description
GS8342Q08/09/18/36AE-278/250/200/167
165-Bump BGA Commercial Temp Industrial Temp
36Mb SigmaQuad-II Burst of 2 SRAM
167 MHz–278 MHz 1.8 V VDD
1.8 V and 1.5 V I/O
Features
Simultaneous Read and Write SigmaQuad™ Interface JEDEC-standard pinout and package Dual Double Data Rate interface Byte Write (x36, x18, and x9) and Nybble Write (x8) function Burst of 2 Read and Write 1.8 V +100/–100 mV core power supply 1.5 V or 1.8 V HSTL Interface Pipelined read operation Fully coherent read and write pipelines ZQ pin for programmable output drive strength IEEE 1149.1 JTAG-compliant Boundary Scan 165-bump, 15 mm x 17 mm, 1 mm bump pitch BGA package RoHS-compliant 165-bump BGA package available Pin-compatible with present 9Mb and 18Mb and future 72Mb
and 144Mb devices
SigmaQuad™ Family Overview
The GS8342Q08/09/18/36AE are built in compliance with the SigmaQuad-II SRAM pinout standard for Separate I/O synchronous SRAMs. They are 37...
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