GS8662R09E

Not Recommended for New Design—Discontinued Product GS8662R08/09/18/36E-250/200/167 165-Bump BGA Commercial Temp Industrial Temp 72Mb SigmaDDR-II™ Burst of 4 SRAM 250 MHz–167 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features Simultaneous Read and Write SigmaDDR-II™ Interface Common I/O bus JEDEC-standard pinout and package Double Data Rate interface Byte Write (x36 and x18) and Nybble Write (x8) function Burst of 4 Read and Write 1.8 V +100/–100 mV core power supply 1.5 V or 1.8 V HSTL Interface Pipelined read operation with self-timed Late Write Fully coherent read and write pipelines ZQ pin for programmable output drive strength IEEE 1149.1 JTAG-compliant Boundary Scan Pin-compatible with present 9Mb, 18Mb, 36Mb and 144Mb devices 165-bump, 15 mm x 17 mm, 1 mm bump pitch BGA package RoHS-compliant 165-bump BGA package available SigmaDDR-II™ Family Overview The GS8662R08/09/18/36E are built in compliance with the Sig...