N-channel MOSFET. PSMN2R0-30YLD Datasheet

PSMN2R0-30YLD MOSFET. Datasheet pdf. Equivalent

PSMN2R0-30YLD Datasheet
Recommendation PSMN2R0-30YLD Datasheet
Part PSMN2R0-30YLD
Description N-channel MOSFET
Feature PSMN2R0-30YLD; PSMN2R0-30YLD N-channel 30 V, 2.0 mΩ logic level MOSFET in LFPAK56 using NextPowerS3 Technology 2.
Manufacture nexperia
Datasheet
Download PSMN2R0-30YLD Datasheet




nexperia PSMN2R0-30YLD
PSMN2R0-30YLD
N-channel 30 V, 2.0 mΩ logic level MOSFET in LFPAK56 using
NextPowerS3 Technology
25 October 2018
Product data sheet
1. General description
Logic level gate drive N-channel enhancement mode MOSFET in LFPAK56 package.
NextPowerS3 portfolio utilising NXP’s unique “SchottkyPlus” technology delivers high efficiency,
low spiking performance usually associated with MOSFETs with an integrated Schottky or
Schottky-like diode but without problematic high leakage current. NextPowerS3 is particularly
suited to high efficiency applications at high switching frequencies.
2. Features and benefits
Ultra low QG, QGD and QOSS for high system efficiency, especially at higher switching
frequencies
Superfast switching with soft-recovery; s-factor > 1
Low spiking and ringing for low EMI designs
Unique “SchottkyPlus” technology; Schottky-like performance with < 1 µA leakage at 25 °C
Optimised for 4.5 V gate drive
Low parasitic inductance and resistance
High reliability clip bonded and solder die attach Power SO8 package; no glue, no wire bonds,
qualified to 175 °C
Wave solderable; exposed leads for optimal visual solder inspection
3. Applications
On-board DC-to-DC solutions for server and telecommunications
Secondary-side synchronous rectification in telecommunication applications
Voltage regulator modules (VRM)
Point-of-Load (POL) modules
Power delivery for V-core, ASIC, DDR, GPU, VGA and system components
Brushed and brushless motor control
4. Quick reference data
Table 1. Quick reference data
Symbol
Parameter
VDS drain-source voltage
ID drain current
Ptot total power dissipation
Tj junction temperature
Static characteristics
RDSon
drain-source on-state
resistance
Dynamic characteristics
Conditions
25 °C ≤ Tj ≤ 175 °C
VGS = 10 V; Tmb = 25 °C; Fig. 2
Tmb = 25 °C; Fig. 1
VGS = 4.5 V; ID = 25 A; Tj = 25 °C;
Fig. 10
VGS = 10 V; ID = 25 A; Tj = 25 °C;
Fig. 10
Min Typ Max Unit
- - 30 V
[1] - - 100 A
- - 142 W
-55 -
175 °C
- 2.1 2.5 mΩ
-
1.61 2



nexperia PSMN2R0-30YLD
Nexperia
PSMN2R0-30YLD
N-channel 30 V, 2.0 mΩ logic level MOSFET in LFPAK56 using NextPowerS3 Technology
Symbol
Parameter
QGD
gate-drain charge
QG(tot)
total gate charge
Source-drain diode
S softness factor
Conditions
ID = 25 A; VDS = 15 V; VGS = 4.5 V;
Fig. 12; Fig. 13
IS = 25 A; dIS/dt = -100 A/µs; VGS = 0 V;
VDS = 15 V; Fig. 16
[1] Continuous current is limited by package.
Min Typ Max Unit
- 6.3 - nC
- 21.8 - nC
- 1.02 -
5. Pinning information
Table 2. Pinning information
Pin Symbol Description
Simplified outline
1 S source
mb
2 S source
3 S source
4 G gate
mb D
mounting base; connected to
drain
1234
LFPAK56; Power-
SO8 (SOT669)
Graphic symbol
D
G
mbb076 S
6. Ordering information
Table 3. Ordering information
Type number
Package
Name
PSMN2R0-30YLD
LFPAK56;
Power-SO8
Description
Plastic single-ended surface-mounted package (LFPAK56;
Power-SO8); 4 leads
Version
SOT669
7. Marking
Table 4. Marking codes
Type number
PSMN2R0-30YLD
Marking code
2D030L
8. Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
VDS
VDGR
VGS
Ptot
ID
IDM
Parameter
Conditions
Min Max Unit
drain-source voltage
25 °C ≤ Tj ≤ 175 °C
- 30 V
drain-gate voltage
25 °C ≤ Tj ≤ 175 °C; RGS = 20 kΩ
- 30 V
gate-source voltage
-20 20
V
total power dissipation
drain current
Tmb = 25 °C; Fig. 1
VGS = 10 V; Tmb = 25 °C; Fig. 2
VGS = 10 V; Tmb = 100 °C; Fig. 2
-
[1] -
[1] -
142 W
100 A
100 A
peak drain current
pulsed; tp ≤ 10 µs; Tmb = 25 °C; Fig. 3
- 793 A
PSMN2R0-30YLD
Product data sheet
All information provided in this document is subject to legal disclaimers.
25 October 2018
© Nexperia B.V. 2018. All rights reserved
2 / 13



nexperia PSMN2R0-30YLD
Nexperia
PSMN2R0-30YLD
N-channel 30 V, 2.0 mΩ logic level MOSFET in LFPAK56 using NextPowerS3 Technology
Symbol
Parameter
Conditions
Tstg storage temperature
Tj junction temperature
Tsld(M)
peak soldering
temperature
VESD
electrostatic discharge HBM
voltage
Source-drain diode
IS
source current
Tmb = 25 °C
ISM
peak source current
pulsed; tp ≤ 10 µs; Tmb = 25 °C
Avalanche ruggedness
EDS(AL)S
non-repetitive drain-
ID = 25 A; Vsup ≤ 30 V; RGS = 50 Ω;
source avalanche energy VGS = 10 V; Tj(init) = 25 °C; unclamped;
tp = 815 µs
[1] Continuous current is limited by package.
[2] Protected by 100% test
120
Pder
(%)
80
03aa16
200
ID
(A)
150
[1]
[2]
Min Max Unit
-55 175 °C
-55 175 °C
- 260 °C
1000 -
V
- 100 A
- 793 A
- 397 mJ
aaa-008403
(1)
100
40
50
0
0 50 100 150 200
Tmb (°C)
Fig. 1. Normalized total power dissipation as a
function of mounting base temperature
0
0 25 50 75 100 125 150 175
Tmb (°C)
(1) Capped at 100A due to package
200
Fig. 2. Continuous drain current as a function of
mounting base temperature
PSMN2R0-30YLD
Product data sheet
All information provided in this document is subject to legal disclaimers.
25 October 2018
© Nexperia B.V. 2018. All rights reserved
3 / 13







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