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Transceiver IC. AX-SFAZ-API Datasheet

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Transceiver IC. AX-SFAZ-API Datasheet






AX-SFAZ-API IC. Datasheet pdf. Equivalent




AX-SFAZ-API IC. Datasheet pdf. Equivalent





Part

AX-SFAZ-API

Description

Transceiver IC



Feature


AX-SFAZ, AX-SFAZ-API Ultra-Low Power, A T Command / API Controlled, Sigfox) Com pliant Transceiver IC for Up-Link and D own-Link www.onsemi.com OVERVIEW Circ uit Description AX−SFAZ and AX−SFAZ −API are ultra−low power single chi p solutions for a node on the Sigfox ne twork with both up− and down−link f unctionality. The AX−SFAZ chip is del ivered fully ready for operation.
Manufacture

ON Semiconductor

Datasheet
Download AX-SFAZ-API Datasheet


ON Semiconductor AX-SFAZ-API

AX-SFAZ-API; and contains all the necessary firmware to transmit and receive data from the Sigfox network in Australia/New Zealand (SIGFOX RCZ4 region). It connects to t he customer product using a logic level RS232 UART. AT commands are used to se nd frames and configure radio parameter s. The AX−SFAZ−API variant is inten ded for customers wishing to write thei r own application soft.


ON Semiconductor AX-SFAZ-API

ware based on the AX−SF−LIB−1−GE VK library. Features Functionality and Ecosystem • Sigfox up−link and down −link functionality controlled by AT commands or API • The AX−SFAZ and A X−SF−API ICs are part of a whole de velopme .


ON Semiconductor AX-SFAZ-API

.

Part

AX-SFAZ-API

Description

Transceiver IC



Feature


AX-SFAZ, AX-SFAZ-API Ultra-Low Power, A T Command / API Controlled, Sigfox) Com pliant Transceiver IC for Up-Link and D own-Link www.onsemi.com OVERVIEW Circ uit Description AX−SFAZ and AX−SFAZ −API are ultra−low power single chi p solutions for a node on the Sigfox ne twork with both up− and down−link f unctionality. The AX−SFAZ chip is del ivered fully ready for operation.
Manufacture

ON Semiconductor

Datasheet
Download AX-SFAZ-API Datasheet




 AX-SFAZ-API
AX-SFAZ, AX-SFAZ-API
Ultra-Low Power,
AT Command / API Controlled,
Sigfox) Compliant
Transceiver IC for Up-Link
and Down-Link
www.onsemi.com
OVERVIEW
Circuit Description
AXSFAZ and AXSFAZAPI are ultralow power
single chip solutions for a node on the Sigfox network with
both upand downlink functionality. The AXSFAZ chip
is delivered fully ready for operation and contains all the
necessary firmware to transmit and receive data from the
Sigfox network in Australia/New Zealand (SIGFOX RCZ4
region). It connects to the customer product using a logic
level RS232 UART. AT commands are used to send frames
and configure radio parameters.
The AXSFAZAPI variant is intended for customers
wishing to write their own application software based on the
AXSFLIB1GEVK library.
Features
Functionality and Ecosystem
Sigfox uplink and downlink functionality controlled
by AT commands or API
The AXSFAZ and AXSFAPI ICs are part of a
whole development and product ecosystem available
from ON Semiconductor for any Sigfox requirement.
Other parts of the ecosystem include
Ready to go development kit
DVKSFAZ[API]1GEVK including a 2 year
Sigfox subscription
Sigfox Ready® certified reference design for the
AXSFAZ and AXSFAZAPI ICs
General Features
QFN40 5 mm x 7 mm package
Supply range 2.7 V* 3.6 V
40°C to 85°C
Temperature sensor
Supply voltage measurements
*Includes the RF frontend module, circuit as in Figure 5.
The AXSFAZ chip alone is operational from 1.8 V to 3.6 V,
a supply voltage below 2.0 V is considered an extreme condition.
8 GPIO pins
2 GPIO pins with selectable voltage measure
functionality, differential (1 V or 10 V range) or
single ended (1 V range) with 10 bit resolution
2 GPIO pins with selectable sigma delta DAC
output functionality
2 GPIO pins with selectable output clock
3 GPIO pins selectable as SPI master interface
RX/TX switching Control
Power Consumption
Ultralow Power Consumption:
Charge required to send a Sigfox OOB packet at
24 dBm output power: 0.28 C
Deepsleep mode current: 100 nA
Sleep mode current: 1.3 mA
Standby mode current: 0.5 mA
Continuous radio RXmode at 922.3 MHz :
34 mA
Continuous radio TXmode at 920.8 MHz
230 mA @ 24 dBm
High Performance Narrowband Sigfox RF Transceiver
Receiver
Carrier frequency 922.3 MHz
Datarate 600 bps FSK
Sensitivity
128 dBm @ 600 bps, 922.3 MHz, GFSK
0 dBm maximum input power
Transmitter
Carrier frequency 920.8 MHz
Datarate 600 bps PSK
High efficiency, high linearity integrated power
amplifier
Maximum output power 24 dBm
Applications
Sigfox networks uplink and downlink.
© Semiconductor Components Industries, LLC, 2017
April, 2017 Rev. 1
1
Publication Order Number:
AXSFAZ/D




 AX-SFAZ-API
BLOCK DIAGRAM
CLKP
CLKN
ANTP1
ANTP
ANTN
UARTRX
UARTTX
GPIO[9:4,1:0]
RADIO_LED
CPU_LED
TX_LED
RX_LED
TX_EN
RX_EN
AXSFAZ, AXSFAZAPI
AXSFAZ / AXSFAZAPI
TCXO
interface
RF synthesis
PA
LNA
Transmit
Receive
Communication
controller
UART
GPIO
DAC
ADC
dedicated
status
outputs
CPU
CAL
FILT
power mode control
RAM
Program
memory
(FLASH)
Sigfox identity (ID, PAC)
Sigfox compliant
application
Figure 1. Functional Block Diagram of the AXSFAZ / AXSFAZAPI
www.onsemi.com
2




 AX-SFAZ-API
AXSFAZ, AXSFAZAPI
Table 1. PIN FUNCTION DESCRIPTIONS
Symbol
Pin(s)
Type
VDD_ANA
1P
GND
2P
ANTP
3A
ANTN
4A
ANTP1
5N
GND
6P
VDD_ANA
7P
GND
8P
FILT 9 A
L2 10 A
L1 11 A
NC 12 N
GPIO8
13 I/O/PU
GPIO7
14 I/O/PU
GPIO6
15 I/O/PU
GPIO5
16 I/O/PU
GPIO4
17 I/O/PU
CPU_LED
RADIO_LED
VTCXO
GPIO9
UARTTX
UARTRX
RX_LED
TX_LED
NC
RESET_N
18 O
19 O
20 O
21 I/O/PU
22 O
23 I/PU
24 O
25 O
26 PD
27 I/PU
GND
VDD_IO
GPIO0
28 P
29 P
30 I/O/A/PU
GPIO1
TX_EN
NC
NC
RX_EN
VDD_IO
CAL
NC
CLKN
31 I/O/A/PU
32 O
33 N
34 N
35 O
36 P
37 A
38 N
39 A
Description
Analog power output, decouple to neighboring GND
Ground, decouple to neighboring VDD_ANA
Differential receive input
Differential receive input
Single ended transmit output
Ground, decouple to neighboring VDD_ANA
Analog power output, decouple to neighboring GND
Ground
Synthesizer filter
Must be connected to pin L1
Must be connected to pin L2
Do not connect
General purpose IO
General purpose IO, selectable SPI functionality (MISO)
General purpose IO, selectable SPI functionality (MOSI)
General purpose IO, selectable SPI functionality (SCK)
General purpose IO, selectable SD DAC functionality, selectable dock
functionality
CPU activity indicator
Radio activity indicator
TCXO power
General purpose IO, wakeup from deep sleep
UART transmit
UART receive
Receive activity indicator
Transmit activity indicator
Do not connect
Optional reset pin. Internal pullup resistor is permanently enabled,
nevertheless it is recommended to connect this pin to VDD_IO if it is not used.
Ground
Unregulated power supply
General purpose IO, selectable ADC functionality, selectable SD DAC
functionality, selectable clock functionality
General purpose IO, selectable ADC functionality
Transmitter Enable (to frontend)
Do not connect
Do not connect
Receiver Enable (to frontend)
Unregulated power supply
Connect to FILT as shown in the application diagram
Do not connect
TCXO interface
www.onsemi.com
3



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