DatasheetsPDF.com

PWM Regulator. ISL62881B Datasheet

DatasheetsPDF.com

PWM Regulator. ISL62881B Datasheet






ISL62881B Regulator. Datasheet pdf. Equivalent




ISL62881B Regulator. Datasheet pdf. Equivalent





Part

ISL62881B

Description

Single-Phase PWM Regulator



Feature


DATASHEET ISL62881, ISL62881B Single-Ph ase PWM Regulator for IMVP-6.5™ Mobil e CPUs and GPUs FN6924 Rev 3.00 June 1 6, 2011 The ISL62881 is a single-phase PWM buck regulator for miroprocessor o r graphics processor core power supply. It uses an integrated gate driver to p rovide a complete solution. The PWM mod ulator of ISL62881 is based on Intersil 's Robust Ripple Reg.
Manufacture

Renesas

Datasheet
Download ISL62881B Datasheet


Renesas ISL62881B

ISL62881B; ulator (R3) technology™. Compared with traditional modulators, the R3™ modu lator commands variable switching frequ ency during load transients, achieving faster transient response. With the sam e modulator, the switching frequency is reduced at light load, increasing the regulator efficiency. The ISL62881 can be configured as CPU or graphics Vcore controller and is full.


Renesas ISL62881B

y compliant with IMVP-6.5™ specificati ons. It responds to DPRSLPVR signals by entering/exiting diode emulation mode. It reports the regulator output curren t through the IMON pin. It senses the c urrent by using either discrete resisto r or inductor DCR w .


Renesas ISL62881B

.

Part

ISL62881B

Description

Single-Phase PWM Regulator



Feature


DATASHEET ISL62881, ISL62881B Single-Ph ase PWM Regulator for IMVP-6.5™ Mobil e CPUs and GPUs FN6924 Rev 3.00 June 1 6, 2011 The ISL62881 is a single-phase PWM buck regulator for miroprocessor o r graphics processor core power supply. It uses an integrated gate driver to p rovide a complete solution. The PWM mod ulator of ISL62881 is based on Intersil 's Robust Ripple Reg.
Manufacture

Renesas

Datasheet
Download ISL62881B Datasheet




 ISL62881B
DATASHEET
ISL62881, ISL62881B
Single-Phase PWM Regulator for IMVP-6.5™ Mobile CPUs and GPUs
FN6924
Rev 3.00
June 16, 2011
The ISL62881 is a single-phase PWM buck regulator for
miroprocessor or graphics processor core power supply. It uses an
integrated gate driver to provide a complete solution. The PWM
modulator of ISL62881 is based on Intersil's Robust Ripple
Regulator (R3) technology™. Compared with traditional
modulators, the R3™ modulator commands variable switching
frequency during load transients, achieving faster transient
response. With the same modulator, the switching frequency is
reduced at light load, increasing the regulator efficiency.
The ISL62881 can be configured as CPU or graphics Vcore
controller and is fully compliant with IMVP-6.5™ specifications. It
responds to DPRSLPVR signals by entering/exiting diode
emulation mode. It reports the regulator output current through
the IMON pin. It senses the current by using either discrete
resistor or inductor DCR whose variation over-temperature can
be thermally compensated by a single NTC thermistor. It uses
differential remote voltage sensing to accurately regulate the
processor die voltage. The adaptive body diode conduction
time reduction function minimizes the body diode conduction
loss in diode emulation mode. User-selectable overshoot
reduction function offers an option to aggressively reduce the
output capacitors as well as the option to disable it for users
concerned about increased system thermal stress.
Maintaining all the ISL62881 functions, the ISL62881B offers
VR_TT# function for thermal throttling control. It also offers the
split LGATE function to further improve light load efficiency.
Features
• Precision Core Voltage Regulation
- 0.5% System Accuracy Over-Temperature
- Enhanced Load Line Accuracy
• Voltage Identification Input
- 7-Bit VID Input, 0V to 1.500V in 12.5mV Steps
- Supports VID Changes On-The-Fly
• Supports Multiple Current Sensing Methods
- Lossless Inductor DCR Current Sensing
- Precision Resistor Current Sensing
• Superior Noise Immunity and Transient Response
• Current Monitor
• Differential Remote Voltage Sensing
• High Efficiency Across Entire Load Range
• Integrated Gate Driver
• Split LGATE Driver to Increase Light-Load Efficiency (for
ISL62881B)
• Adaptive Body Diode Conduction Time Reduction
• User-selectable Overshoot Reduction Function
• Capable of Disabling the Droop Function
• Audio-filtering for GPU Application
• Small Footprint 28 Ld 4x4 TQFN Package
• Pb-Free (RoHS Compliant)
Applications
• Notebook Computers
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
PART
MARKING
TEMP. RANGE
(°C)
PACKAGE
(Pb-Free)
PKG.
DWG. #
ISL62881HRTZ
628 81HRTZ
-10 to +100
28 Ld 4x4 TQFN
L28.4x4
ISL62881BHRTZ
62881B HRTZ
-10 to +100
32 Ld 5x5 TQFN
L32.5x5E
NOTES:
1. Add “-T*” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-
free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for ISL62881, ISL62881B. For more information on MSL please see techbrief
TB363.
FN6924 Rev 3.00
June 16, 2011
Page 1 of 35




 ISL62881B
ISL62881, ISL62881B
Pin Configurations
ISL62881
(28 LD TQFN)
TOP VIEW
ISL62881B
(32 LD TQFN)
TOP VIEW
28 27 26 25 24 23 22
CLK_EN# 1
PGOOD 2
RBIAS 3
VW 4
COMP 5
FB 6
VSEN 7
GND PAD
(BOTTOM)
21 VID1
20 VID0
19 VCCP
18 LGATE
17 VSSP
16 PHASE
15 UGATE
8 9 10 11 12 13 14
32 31 30 29 28 27 26 25
PGOOD 1
RBIAS 2
VR_TT# 3
NTC 4
GND 5
VW 6
COMP 7
FB 8
GND PAD
(BOTTOM)
24 VID1
23 VID0
22 VCCP
21 LGATEb
20 LGATEa
19 VSSP
18 PHASE
17 UGATE
9 10 11 12 13 14 15 16
Pin Function Descriptions
GND (Bottom Pad)
Signal common of the IC. Unless otherwise stated, signals are
referenced to the GND pin.
CLK_EN#
Open drain output to enable system PLL clock; goes active 13
switching cycles after Vcore is within 10% of Vboot.
PGOOD
Power-Good open-drain output indicating when the regulator is
able to supply regulated voltage. Pull-up externally with a 680
resistor to VCCP or 1.9kto 3.3V.
RBIAS
A resistor to GND sets internal current reference. A 147k
resistor sets the controller for CPU core application and a 47k
resistor sets the controller for GPU core application.
VR_TT#
Thermal overload output indicator.
NTC
Thermistor input to VR_TT# circuit.
VW
A resistor from this pin to COMP programs the switching
frequency (8kgives approximately 300kHz).
FN6924 Rev 3.00
June 16, 2011
COMP
This pin is the output of the error amplifier. Also, a resistor across this
pin and GND adjusts the overcurrent threshold.
FB
This pin is the inverting input of the error amplifier.
VSEN
Remote core voltage sense input. Connect to microprocessor die.
RTN
Remote voltage sensing return. Connect to ground at
microprocessor die.
ISUM- and ISUM+
Droop current sense input.
VDD
5V bias power.
VIN
Battery supply voltage, used for feed-forward.
IMON
An analog output. IMON outputs a current proportional to the
regulator output current.
BOOT
Connect an MLCC capacitor across the BOOT and the PHASE
pins. The boot capacitor is charged through an internal boot
Page 2 of 35




 ISL62881B
ISL62881, ISL62881B
diode connected from the VCCP pin to the BOOT pin, each time
the PHASE pin drops below VCCP minus the voltage dropped
across the internal boot diode.
UGATE
Output of the high-side MOSFET gate driver. Connect the UGATE
pin to the gate of the high-side MOSFET.
PHASE
Current return path for the high-side MOSFET gate driver. Connect
the PHASE pin to the node consisting of the high-side MOSFET
source, the low-side MOSFET drain and the output inductor.
VSSP
Current return path for the low-side MOSFET gate driver. Connect
the VSSP pin to the source of the low-side MOSFET through a low
impedance path, preferably in parallel with the trace connecting
the LGATE pin to the gate of the low-side MOSFET.
LGATE (for ISL62881)
Output of the low-side MOSFET gate driver. Connect the LGATE
pin to the gate of the low-side MOSFET.
LGATEa (for ISL62881B)
Output of the low-side MOSFET gate driver that is always active.
Connect the LGATEa pin to the gate of the low-side MOSFET that
is active all the time.
LGATEb (For ISL62881B)
Another output of the low-side MOSFET gate driver. This gate
driver will be pulled low when the DPRSLPVR pin logic is high.
Connect the LGATEb pin to the gate of the low-side MOSFET that
is idle in deeper sleep mode.
VCCP
Input voltage bias for the internal gate drivers. Connect +5V to
the VCCP pin. Decouple with at least 1µF of an MLCC capacitor to
VSSP1 and VSSP2 pins respectively.
VID0, VID1, VID2, VID3, VID4, VID5, VID6
VID input with VID0 = LSB and VID6 = MSB.
VR_ON
Voltage regulator enable input. A high level logic signal on this
pin enables the regulator.
DPRSLPVR
A high level logic signal on this pin puts the ISL62881 in 1-phase
diode emulation mode. If RBIAS = 47k(GPU VR application), this
pin also controls Vcore slew rate. Vcore slews at 5mV/µs for
DPRSLPVR = 0 and 10mV/µs for DPRSLPVR = 1. If RBIAS = 147k
(CPU VR application), this pin doesn’t control Vcore slew rate.
FN6924 Rev 3.00
June 16, 2011
Page 3 of 35



Recommended third-party ISL62881B Datasheet






@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site (Privacy Policy & Contact)