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Controlled Potentiometer. ISL22316 Datasheet

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Controlled Potentiometer. ISL22316 Datasheet






ISL22316 Potentiometer. Datasheet pdf. Equivalent




ISL22316 Potentiometer. Datasheet pdf. Equivalent





Part

ISL22316

Description

Single Digitally Controlled Potentiometer



Feature


DATASHEET ISL22316 Single Digitally Con trolled Potentiometer (XDCP™) Low Noi se, Low Power I2C™ Bus, 128 Taps FN6 186 Rev 3.00 August 14, 2015 The ISL22 316 integrates a single digitally contr olled potentiometer (DCP) and non-volat ile memory on a monolithic CMOS integra ted circuit. The digitally controlled p otentiometer is implemented with a comb ination of resistor el.
Manufacture

Renesas

Datasheet
Download ISL22316 Datasheet


Renesas ISL22316

ISL22316; ements and CMOS switches. The position o f the wipers are controlled by the user through the I2C bus interface. The pot entiometer has an associated volatile W iper Register (WR) and a non-volatile I nitial Value Register (IVR) that can be directly written to and read by the us er. The contents of the WR controls the position of the wiper. At power-up, th e device recalls t.


Renesas ISL22316

he contents of the DCP’s IVR to the WR . The DCP can be used as a three-termin al potentiometer or as a two-terminal v ariable resistor in a wide variety of a pplications including control, paramete r adjustments, and signal processing. Pinouts SCL SDA A1 A .


Renesas ISL22316

.

Part

ISL22316

Description

Single Digitally Controlled Potentiometer



Feature


DATASHEET ISL22316 Single Digitally Con trolled Potentiometer (XDCP™) Low Noi se, Low Power I2C™ Bus, 128 Taps FN6 186 Rev 3.00 August 14, 2015 The ISL22 316 integrates a single digitally contr olled potentiometer (DCP) and non-volat ile memory on a monolithic CMOS integra ted circuit. The digitally controlled p otentiometer is implemented with a comb ination of resistor el.
Manufacture

Renesas

Datasheet
Download ISL22316 Datasheet




 ISL22316
DATASHEET
ISL22316
Single Digitally Controlled Potentiometer (XDCP™) Low Noise, Low Power I2C™
Bus, 128 Taps
FN6186
Rev 3.00
August 14, 2015
The ISL22316 integrates a single digitally controlled
potentiometer (DCP) and non-volatile memory on a
monolithic CMOS integrated circuit.
The digitally controlled potentiometer is implemented with a
combination of resistor elements and CMOS switches. The
position of the wipers are controlled by the user through the
I2C bus interface. The potentiometer has an associated
volatile Wiper Register (WR) and a non-volatile Initial Value
Register (IVR) that can be directly written to and read by the
user. The contents of the WR controls the position of the
wiper. At power-up, the device recalls the contents of the
DCP’s IVR to the WR.
The DCP can be used as a three-terminal potentiometer or
as a two-terminal variable resistor in a wide variety of
applications including control, parameter adjustments, and
signal processing.
Pinouts
SCL
SDA
A1
A0
SHDN
ISL22316
(10 LD MSOP)
TOP VIEW
1 10
29
38
47
56
VCC
RH
RW
RL
GND
Features
• 128 resistor taps
• I2C serial interface
- Two address pins, up to four devices/bus
• Non-volatile storage of wiper position
• Wiper resistance: 70typical @ VCC = 3.3V
• Shutdown mode
• Shutdown current 5µA max
• Power supply: 2.7V to 5.5V
• 50kor 10ktotal resistance
• High reliability
- Endurance: 1,000,000 data changes per bit per register
- Register data retention: 50 years @ T +55°C
• 10 Ld MSOP or 10 Ld TDFN package
• Pb-free (RoHS compliant)
ISL22316
(10 LD TDFN)
TOP VIEW
SCL 1 O
SDA 2
A1 3
A0 4
SHDN 5
10 VCC
9 RH
8 RW
7 RL
6 GND
Ordering Information
PART NUMBER
(Note)
PART
MARKING
RESISTANCE OPTION
(k)
TEMP. RANGE
(°C)
PACKAGE
(Pb-free)
PKG. DWG. #
ISL22316UFU10Z*
(No longer available,
recommended
replacement:
(ISL22316WFRT10Z-TK)
316UZ
50
-40 to +125
10 Ld MSOP
M10.118
ISL22316WFU10Z*
316WZ
10
-40 to +125
10 Ld MSOP
M10.118
ISL22316UFRT10Z*
(No longer available,
recommended
replacement:
(ISL22316WFRT10Z-TK)
316U
50
-40 to +125
10 Ld 3x3 TDFN
L10.3x3B
ISL22316WFRT10Z*
316W
10
-40 to +125
10 Ld 3x3 TDFN
L10.3x3B
*Add “-TK” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100%
matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations).
Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J
STD-020.
FN6186 Rev 3.00
August 14, 2015
Page 1 of 16




 ISL22316
ISL22316
Block Diagram
SCL
SDA
A0
A1
I2C
INTERFACE
VCC
POWER-UP
INTERFACE,
CONTROL
AND
STATUS
LOGIC
SHDN
NON-VOLATILE
REGISTERS
WR
RH
RW
RL
Pin Descriptions
MSOP PIN
NUMBER
TDFN PIN
NUMBER
11
22
33
44
55
66
77
88
99
10 10
GND
PIN NAME
SCL
SDA
A1
A0
SHDN
GND
RL
RW
RH
VCC
DESCRIPTION
Open drain I2C interface clock input
Open drain Serial data I/O for the I2C interface
Device address input for the I2C interface
Device address input for the I2C interface
Shutdown active low input
Device ground pin
“Low” terminal of DCP
“Wiper” terminal of DCP
“High” terminal of DCP
Power supply pin
FN6186 Rev 3.00
August 14, 2015
Page 2 of 16




 ISL22316
ISL22316
Absolute Maximum Ratings
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Voltage at any Digital Interface Pin
with Respect to GND . . . . . . . . . . . . . . . . . . . . . -0.3V to VCC+0.3
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +6V
Voltage at any DCP Pin with
Respect to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to VCC
IW (10s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±6mA
Latchup (Note 1) . . . . . . . . . . . . . . . . . . Class II, Level B @ +125°C
ESD Ratings
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5kV
Charge Device Model. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1kV
Thermal Information
Thermal Resistance (Typical)
JA (°C/W) JC (°C/W)
10 Lead MSOP (Note 2). . . . . . . . . . . . 162
N/A
10 Lead TDFN (Notes 3, 4) . . . . . . . . .
74
7
Maximum Junction Temperature (Plastic Package). . . . . . . . +150°C
Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions
Temperature Range (Extended Industrial). . . . . . . .-40°C to +125°C
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.5V
Power Rating of each DCP . . . . . . . . . . . . . . . . . . . . . . . . . . . .5mW
Wiper Current of each DCP . . . . . . . . . . . . . . . . . . . . . . . . . . ±3.0mA
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
1. Jedec Class II pulse conditions and failure criterion used. Level B exceptions are: using a max positive pulse of 6.5V on the SHDN pin, and using
a max negative pulse of -1V for all pins.
2. JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
3. JA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
4. For JC, the “case temp” location is the center of the exposed metal pad on the package underside.
Analog Specifications Over recommended operating conditions, unless otherwise stated.
SYMBOL
RTOTAL
PARAMETER
RH to RL Resistance
RH to RL Resistance Tolerance
End-to-End Temperature Coefficient
TEST CONDITIONS
W option
U option
W option
U option
RW
VRH, VRL
CH/CL/CW
(Note 18)
Wiper Resistance
VRH and VRL Terminal Voltages
Potentiometer Capacitance
VCC = 3.3V, wiper current = VCC/RTOTAL
VRH and VRL to GND
ILkgDCP Leakage on DCP Pins
Voltage at pin from GND to VCC
VOLTAGE DIVIDER MODE (0V @ RL; VCC @ RH; measured at RW, unloaded)
INL
(Note 10)
Integral Non-linearity
Monotonic over all tap positions, W and U
option
DNL
(Note 9)
Differential Non-linearity
Monotonic over all tap positions, W and U
option
ZSerror
(Note 7)
Zero-scale Error
W option
U option
FSerror
(Note 8)
Full-scale Error
W option
U option
TCV Ratiometric Temperature Coefficient DCP register set to 40 hex for W and U
(Notes 11, 18)
option
MIN
(Note 19)
-20
0
-1
-0.5
0
0
-5
-2
TYP MAX
(Note 5) (Note 19) UNIT
10 k
50 k
+20 %
±50 ppm/°C
(Note 18)
±80 ppm/°C
(Note 18)
70 200
10/10/25
VCC
V
pF
0.1 1 µA
1 LSB
(Note 6)
0.5 LSB
(Note 6)
1 5 LSB
0.5 2 (Note 6)
-1 0 LSB
-1 0 (Note 6)
±4 ppm/°C
FN6186 Rev 3.00
August 14, 2015
Page 3 of 16



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