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TB67S109AFTG/FNG
TOSHIBA BiCD Integrated Circuit Silicon Monolithic
TB67S109AFTG, TB67S109AFNG
CLOCK-in controlled Bipolar Stepping Motor Driver
The TB67S109A is a two-phase bipolar stepping motor driver using a PWM chopper. The clock in decoder is built in. Fabricated with the BiCD process, rating is 50 V/4.0 A .
FTG
Features
・BiCD process integrated monolithic IC. ・Capable of controlling 1 bipolar stepping motor. ・PWM controlled constant-current drive. ・Allows full, half, quarter, 1/8, 1/16, 1/32 step operation. ・Low on-resistance (High + Low side=0.49Ω(typ.)) MOSFET output stage. ・High efficiency motor current control mechanism (Advanced Dynamic Mixed Decay) ・High voltage and current (For specification, please refer to absolute maximum ratings and operation ranges) ・Error detection (TSD/ISD) signal output function ・Built-in error detection circuits (Thermal shutdown (TSD)、over-current shutdown (ISD), and power-on reset (POR)) ・Built-in VCC regulator for internal circuit use. ・Chopping frequency of a motor can be customized by external resistance and capacitor. ・Multi package lineup
TB67S109AFTG: P-WQFN48-0707-0.50-003 TB67S109AFNG: HTSSOP48-P-300-0.50
P-WQFN48-0707-0.50-003 Weight 0.10g (typ.)
FNG
HTSSOP48-P-300-0.50 Weight 0.21g (typ.)
Note) Please be careful about thermal conditions during use.
© 2014 TOSHIBA Corporation
1
2014-04-07
Pin assignment (TB67S109A)
(Top View)
TB67S109AFTG/FNG
NC NC VCC NC VM NC RSB RSB NC OUTB+ OUTB+ NC
36 35 34 33 32 31 30 29 28 27 26 25
NC LO DMODE0
37 38 39
24 NC 23 NC 22 GND
GND 40 VREFB 41 VREFA 42 OSCM 43 CW/CCW 44
MO 45 DMODE1 46 DMODE2 47
NC 48
FTG
21 OUTB20 OUTB19 GND 18 GND 17 OUTA16 OUTA15 GND 14 NC 13 NC
1 2 3 4 5 6 7 8 9 10 11 12
NC CLK ENABLE RESET GND NC RSA RSA NC OUTA+ OUTA+ NC
Please mount the four corner pins of the QFN package and the exposed pad to the GND area of the PCB. (Top View)
OSCM NC
CW/CCW
MO DMODE1
NC DMODE2
CLK
ENABLE
RESET GND
NC RSA
RSA NC
OUTA+ OUTA+
NC NC GND NC OUTA- OUTA- GND
1
2 3 4
5 6
7 8 9 10 11 12 13
14 15 16 17 18 19 20 21 22 23
24
FNG
48 VREFA 47 VREFB 46 GND 45 DMODE0 44 LO 43 NC 42 NC 41 VCC 40 NC 39 VM 38 NC 37 NC
36 RSB 35 RSB 34 NC 33 OUTB+ 32 OUTB+ 31 NC
30 NC 29 GND 28 NC 27 OUTB- 26 OUTB- 25 GND
Please mount the exposed pad of the HTSSOP package to the GND area of the PCB.
2
2014-04-07
TB67S109A Block diagram
TB67S109AFTG/FNG
DMODE0 DMODE1 DMODE2
CW/CCW CLK
RESET ENABLE
Standby Control
+ Step Resolution Selector
Signal Decode Logic
OSC-Clock Converter
System Oscillator
Power-on Reset
Motor Oscillator
VCC Regulator
Current Level Set
Current Reference
Setting
OSCM VCC VM
VREFA VREFB
MO LO
Angle monitor
Error Output
Current Comp
RSA
Motor Control Logic
Predriver
TSD
Predriver
Current Comp
ISD
RSB
H-bridge
H-bridge
GND
OUTA+ OUTA-
OUTB+ OUTB-
Functional blocks/circuits/constants in the block chart etc. may be omitted or simplified for explanatory purposes.
3 2014-04-07
TB67S109AFTG/FNG
Application Notes
All t.