128Mb SYNCHRONOUS DRAM
IS42/45S81600F IS42/45S16800F
16Mx8, 8Mx16 128Mb SYNCHRONOUS DRAM
SEPTEMBER 2019
FEATURES • Clock frequency: 200, 166,...
Description
IS42/45S81600F IS42/45S16800F
16Mx8, 8Mx16 128Mb SYNCHRONOUS DRAM
SEPTEMBER 2019
FEATURES Clock frequency: 200, 166, 143 MHz
Fully synchronous; all signals referenced to a positive clock edge
Internal bank for hiding row access/precharge
Power supply
Vdd Vddq IS42/45S81600F 3.3V 3.3V
IS42/45S16800F 3.3V 3.3V
LVTTL interface
Programmable burst length – (1, 2, 4, 8, full page)
Programmable burst sequence: Sequential/Interleave
Auto Refresh (CBR)
Self Refresh
4096 refresh cycles every 16 ms (A2 grade) or 64 ms (Commercial, Industrial, A1 grade)
Random column address every clock cycle Programmable CAS latency (2, 3 clocks)
Burst read/write and burst read/single write operations capability
Burst termination by burst stop and precharge command
Temperature Ranges: Commercial (0oC to +70oC) Industrial (-40oC to +85oC) Automotive, A1 (-40oC to +85oC) Automotive, A2 (-40oC to +105oC)
OVERVIEW
ISSI's 128Mb Synchronous DRAM achieves high-speed
data transfer using pipeline architecture. All inputs and outputs signals refer to the rising edge of the clock input. The 128Mb SDRAM is organized as follows.
IS42/45S81600F IS42/45S16800F
4M x8 x4 Banks 2M x16 x4 Banks
54-pin TSOPII 54-pin TSOPII
54-ball BGA
KEY TIMING PARAMETERS
Parameter
-5 -6 -7 Unit
Clk Cycle Time CAS Latency = 3 CAS Latency = 2
5
6
7
ns
10 10 7.5 ns
Clk Frequency CAS Latency = 3 CAS Latency = 2
200 166 143 Mhz 100 100 133 Mhz
Access Time f...
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