Document
PBSS4230PAN
30 V, 2 A NPN/NPN low VCEsat (BISS) transistor
14 December 2012
Product data sheet
1. General description
NPN/NPN low VCEsat Breakthrough In Small Signal (BISS) transistor in a leadless medium power DFN2020-6 (SOT1118) Surface-Mounted Device (SMD) plastic package.
NPN/PNP complement: PBSS4230PANP. PNP/PNP complement: PBSS5230PAP.
2. Features and benefits
• Very low collector-emitter saturation voltage VCEsat • High collector current capability IC and ICM • High collector current gain hFE at high IC • Reduced Printed-Circuit Board (PCB) requirements • High efficiency due to less heat generation • AEC-Q101 qualified
3. Applications
• Load switch • Battery-driven devices • Power management • Charging circuits • Power switches (e.g. motors, fans)
4. Quick reference data
Table 1. Quick reference data
Symbol
Parameter
Per transistor
VCEO
collector-emitter voltage
IC collector current
ICM peak collector current
Per transistor
RCEsat
collector-emitter saturation resistance
Conditions open base
single pulse; tp ≤ 1 ms IC = 1 A; IB = 0.1 A; pulsed; tp ≤ 300 µs; δ ≤ 0.02 ; Tamb = 25 °C
Min Typ Max Unit
- - 30 V - - 2A - - 3A
- - 145 mΩ
Nexperia
PBSS4230PAN
30 V, 2 A NPN/NPN low VCEsat (BISS) transistor
5. Pinning information
Table 2. Pinning information Pin Symbol Description 1 E1 emitter TR1 2 B1 base TR1 3 C2 collector TR2 4 E2 emitter TR2 5 B2 base TR2 6 C1 collector TR1 7 C1 collector TR1 8 C2 collector TR2
Simplified outline
654
Graphic symbol
C1 B2 E2
78
TR2 TR1
123
Transparent top view
DFN2020-6 (SOT1118)
E1 B1 C2
sym140
6. Ordering information
Table 3. Ordering information
Type number
Package
Name
PBSS4230PAN
DFN2020-6
Description
plastic thermal enhanced ultra thin small outline package; no leads; 6 terminals; body 2 x 2 x 0.65 mm
Version SOT1118
7. Marking
Table 4. Marking codes Type number PBSS4230PAN
Marking code 2G
8. Limiting values
Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Per transistor
VCBO
collector-base voltage
open emitter
VCEO
collector-emitter voltage
open base
VEBO
emitter-base voltage
open collector
IC collector current
ICM
peak collector current
single pulse; tp ≤ 1 ms
IB base current
PBSS4230PAN
All information provided in this document is subject to legal disclaimers.
Product data sheet
14 December 2012
Min Max Unit
- 30 V - 30 V - 7V - 2A - 3A - 0.3 A
© Nexperia B.V. 2017. All rights reserved
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Nexperia
PBSS4230PAN
30 V, 2 A NPN/NPN low VCEsat (BISS) transistor
Symbol IBM Ptot
Per device Ptot
Tj Tamb Tstg
Parameter peak base current total power dissipation
Conditions single pulse; tp ≤ 1 ms Tamb ≤ 25 °C
Min Max Unit - 1A
[1] -
370 mW
[2] -
570 mW
[3] -
530 mW
[4] -
700 mW
[5] -
450 mW
[6] -
760 mW
[7] -
700 mW
[8] -
1450 mW
total power dissipation
Tamb ≤ 25 °C
junction temperature ambient temperature storage temperature
[1] -
510 mW
[2] -
780 mW
[3] -
730 mW
[4] -
960 mW
[5] -
620 mW
[6] -
1040 mW
[7] -
960 mW
[8] -
2000 mW
- 150 °C
-55 150 °C
-65 150 °C
[1] Device mounted on an FR4 PCB, single-sided 35 µm copper strip line, tin-plated and standard footprint. [2] Device mounted on an FR4 PCB, single-sided 35 µm copper strip line, tin-plated, mounting pad for
collector 1 cm2. [3] Device mounted on 4-layer PCB 35 µm copper strip line, tin-plated and standard footprint. [4] Device mounted on 4-layer PCB 35 µm copper strip line, tin-plated, mounting pad for collector 1 cm2. [5] Device mounted on an FR4 PCB, single-sided 70 µm copper strip line, tin-plated and standard footprint. [6] Device mounted on an FR4 PCB, single-sided 70 µm copper strip line, tin-plated, mounting pad for
collector 1 cm2. [7] Device mounted on 4-layer PCB 70 µm copper strip line, tin-plated and standard footprint. [8] Device mounted on 4-layer PCB 70 µm copper strip line, tin-plated, mounting pad for collector 1 cm2.
PBSS4230PAN
Product data sheet
All information provided in this document is subject to legal disclaimers.
14 December 2012
© Nexperia B.V. 2017. All rights reserved
3 / 17
Nexperia
1.5
(1)
Ptot (W)
1.0
(2) (3) (4) (5)
0.5 (6)
(7) (8)
PBSS4230PAN
30 V, 2 A NPN/NPN low VCEsat (BISS) transistor
006aad165
0 -75 -25 25 75
Fig. 1.
(1) 4-layer PCB 70 µm, mounting pad for collector 1 cm2 (2) FR4 PCB 70 µm, mounting pad for collector 1 cm2 (3) 4-layer PCB 70 µm, standard footprint (4) 4-layer PCB 35 µm, mounting pad for collector 1 cm2 (5) FR4 PCB 35 µm, mounting pad for collector 1 cm2 (6) 4-layer PCB 35 µm, standard footprint (7) FR4 PCB 70 µm, standard footprint (8) FR4 PCB 35 µm, standard footprint
Per transistor: power derating curves
125 175 Tamb (°C)
9. Thermal characteristics
Table 6. Thermal characteristics
Symbol
Parameter
Per transistor
Rth(j-a)
thermal resistance from junction to ambient
Conditions in free air
Rth(j-sp)
th.