MPC8569E Datasheet (data sheet) PDF





MPC8569E Datasheet, PowerQUICC III Integrated Processor Hardware Specifications

MPC8569E   MPC8569E  

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Freescale Semiconductor Data Sheet: Tech nical Data MPC8569E PowerQUICC III Inte grated Processor Hardware Specification s Document Number: MPC8569EEC Rev. 2, 10/2013 MPC8569E • High-performance, 32-bit e500 core, scaling up to 1.33 G Hz, that implements the Power Architect ure® technology – 2799 MIPS at 1.33 GHz (estimated Dhrystone 2.1) – 36-bi t physical addressing – Double-precis ion embedded floating point APU using 6 4-bit operands – Embedded vector and scalar single-precision floating-point APUs using 32- or 64-bit operands – M emory management unit (MMU) • Integra ted L1/L2 cache – L1 cache—32-Kbyte data and 32-Kbyte instruction – L2 cache—51

MPC8569E Datasheet, PowerQUICC III Integrated Processor Hardware Specifications

MPC8569E   MPC8569E  
2-Kbyte (8-way set associative) • Two DDR2/DDR3 SDRAM memory controllers with full ECC support – One 64-bit or two 32-bit data bus configuration – Up t o 400 MHz clock (800 MHz data rate) – Supporting up to 16 Gbytes of main mem ory – Using ECC, detects and corrects all single-bit errors and detects all double-bit errors and all errors within a nibble – Invoke a level of system power management by asserting MCKE SDRA M signal on-the-fly to put the memory i nto a low-power sleep mode – Both har dware and software options to support b attery-backed main memory – Initializ ation bypass feature that allow system designers to prevent re-initialization of main memory during system power on f ollowing abnormal shutdown • Integrat ed security engine (SEC) optimized to p rocess all the algorithms associated wi th IPsec, IKE, SSL/TLS, iSCSI, SRTP, IE EE Std 802.11i™, IEEE Std 802.16™ ( WiMAX), IEEE 802.1ae™ (MACSec), 3GPP, A5/3 for GSM and EDGE, and GEA3 for GP RS. – XOR engine for parity checking in RAID storage applications – Four c rypto-channels, each supporting multi-c ommand descriptor chains – Cryptogra phic execution units for PKEU, DEU, AES U, AFEU, MDEU, KEU, CRCU, RNG and SEU- SNOW • QUICC Engine technology – Fo ur 32-bit RISC cores – Supports Ethernet, ATM, POS, and T1/E1 along with associated i








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