74LVC374A Datasheet (data sheet) PDF





74LVC374A Datasheet, Octal D-type flip-flop

74LVC374A   74LVC374A  

Search Keywords: 74LVC374A, datasheet, pdf, nexperia, Octal, D-type, flip-flop, stock, pinout, distributor, price, schematic, inventory, databook, Electronic, Components, Parameters, parts, cross reference, chip, Semiconductor, circuit, Electric, manual, substitute, Equivalent

74LVC374A Octal D-type flip-flop; 5 V t olerant inputs/outputs; positive-edge t rigger; 3-state Rev. 3 — 6 December 2012 Product data sheet 1. General de scription The 74LVC374A is an octal D-t ype flip-flop featuring separate D-type inputs for each flip-flop and 3-state outputs for bus-oriented applications. A clock input (CP) and an outputs enabl e input (OE) are common to all flip-flo ps. The eight flip-flops will store the state of their individual D-inputs tha t meet the set-up and hold times requir ements on the LOW-to-HIGH CP transition . When pin OE is LOW, the contents of t he eight flip-flops is available at the outputs. When pin OE is HI

74LVC374A Datasheet, Octal D-type flip-flop

74LVC374A   74LVC374A  
GH, the outputs go to the high-impedance OFF-state. Operation of the OE input d oes not affect the state of the flip-fl ops. Inputs can be driven from either 3 .3 V or 5 V devices. When disabled, up to 5.5 V can be applied to the outputs. These features allow the use of these devices as translators in mixed 3.3 V a nd 5 V applications. The 74LVC374A is f unctionally identical to the 74LVC574A, but has a different pin arrangement. 2 . Features and benefits  5 V toleran t inputs/outputs; for interfacing with 5 V logic  Wide supply voltage range from 1.2 V to 3.6 V  CMOS low power consumption  Direct interface with TTL levels  High-impedance when VCC = 0 V  8-bit positive edge-triggered register  Independent register and 3-state buffer operation  Complies w ith JEDEC standard:  JESD8-7A (1.65 V to 1.95 V)  JESD8-5A (2.3 V to 2.7 V)  JESD8-C/JESD36 (2.7 V to 3.6 V)  ESD protection:  HBM JESD22-A11 4F exceeds 2000 V  MM JESD22-A115-B exceeds 200 V  CDM JESD22-C101E exce eds 1000 V  Specified from 40  C to +85 C and 40 C to +125 C Nexperia 74LVC374A Octal D-type fl ip-flop; 5 V tolerant inputs/outputs; p ositive-edge trigger; 3-state 3. Order ing information Table 1. Ordering info rmation Type number Package Temperature range Name Description 74LVC374AD 40 C to +125 C








@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site (Privacy Policy & Contact)