SHARC Processor
SUMMARY
High performance 32-bit/40-bit floating-point processor optimized for high performance audio processing
Single-i...
Description
SUMMARY
High performance 32-bit/40-bit floating-point processor optimized for high performance audio processing
Single-instruction, multiple-data (SIMD) computational architecture
On-chip memory—2M bits of on-chip SRAM and 6M bits of on-chip mask programmable ROM
Code compatible with all other members of the SHARC family 400 MHz core instruction rate with unique audiocentric
peripherals such as the digital applications interface, S/PDIF transceiver, serial ports, 8-channel asynchronous sample rate converter, precision clock generators, and more. For complete ordering information, see Ordering Guide.
SHARC Processor
ADSP-21369
DEDICATED AUDIO COMPONENTS
S/PDIF-compatible digital audio receiver/transmitter 4 independent asynchronous sample rate converters (SRC) 16 PWM outputs configured as four groups of four outputs ROM-based security features include
JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit
access under program control to sensitive code PLL has a wide variety of software and hardware multi-
plier/divider ratios Available in 256-ball BGA_ED and 208-lead LQFP_EP
packages
SIMD Core
Instruction Cache
5 stage Sequencer
DAG1/2
Timer
PEx PEy
FLAGx/IRQx/ TMREXP
JTAG
Block 0 RAM/ROM
Internal Memory
Block 1 RAM/ROM
Block 2 RAM
Block 3 RAM
DMD 64-BIT
S
DMD 64-BIT
PMD 64-BIT
Core Bus Cross Bar
PERIPHERAL BUS 32-BIT
PMD 64-BIT EPD BUS 32-BIT
B0D 64-BIT
B1D 64-BIT
B2D 64-BIT
Internal Memory I/F
IOD0 32...
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