ADSP-21369 Datasheet (data sheet) PDF

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SUMMARY High performance 32-bit/40-bit f loating-point processor optimized for h igh performance audio processing Single -instruction, multiple-data (SIMD) comp utational architecture On-chip memory†”2M bits of on-chip SRAM and 6M bits of on-chip mask programmable ROM Code com patible with all other members of the S HARC family 400 MHz core instruction ra te with unique audiocentric pe

ripherals such as the digital applicatio ns interface, S/PDIF transceiver, seria l ports, 8-channel asynchronous sample rate converter, precision clock generat ors, and more. For complete ordering in formation, see Ordering Guide. SHARC P rocessor ADSP-21369 DEDICATED AUDIO COM PONENTS S/PDIF-compatible digital audio receiver/transmitter 4 independent asy nchronous sample rate conver