Triple buffer gate
74HC3G34; 74HCT3G34
Triple buffer gate
Rev. 7 — 11 June 2018
Product data sheet
1 General description
The 74HC3G34; ...
Description
74HC3G34; 74HCT3G34
Triple buffer gate
Rev. 7 — 11 June 2018
Product data sheet
1 General description
The 74HC3G34; 74HCT3G34 is a triple buffer. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
2 Features and benefits
Wide supply voltage range from 2.0 V to 6.0 V Input levels:
– For 74HC3G34: CMOS level – For 74HCT3G34: TTL level Complies with JEDEC standard no. 7 A Symmetrical output impedance High noise immunity Low-power dissipation Balanced propagation delays Multiple package options ESD protection: – HBM JESD22-A114E exceeds 2000 V – MM JESD22-A115-A exceeds 200 V Specified from -40 °C to +85 °C and -40 °C to +125 °C
3 Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
74HC3G34DP
-40 °C to +125 °C TSSOP8
74HCT3G34DP
74HC3G34DC
-40 °C to +125 °C VSSOP8
74HCT3G34DC
Description
plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm
Version SOT505-2
plastic very thin shrink small outline package; 8 leads; body width 2.3 mm
SOT765-1
Nexperia
74HC3G34; 74HCT3G34
Triple buffer gate
4 Marking
Table 2. Marking Type number 74HC3G34DP 74HCT3G34DP 74HC3G34DC 74HCT3G34DC
Marking code[1] H34 T34 P34 U34
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5 Functional diagram
1 1A
1Y 7
2 3Y
3A 6
3 2A
2Y 5
Figure 1. Logic symbol
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