Document
PBSS4440D
40 V NPN low VCEsat (BISS) transistor
Rev. 02 — 11 December 2009
Product data sheet
1. Product profile
1.1 General description
NPN low VCEsat Breakthrough In Small Signal (BISS) transistor in a SOT457 (SC-74) SMD plastic package.
PNP complement: PBSS5440D.
1.2 Features
Ultra low collector-emitter saturation voltage VCEsat 4 A continuous collector current capability IC (DC) Up to 15 A peak current Very low collector-emitter saturation resistance High efficiency due to less heat generation
1.3 Applications
Power management functions Charging circuits DC-to-DC conversion MOSFET gate driving Power switches (e.g. motors, fans) Thin Film Transistor (TFT) backlight inverter
1.4 Quick reference data
Table 1. Symbol VCEO IC ICM
RCEsat
Quick reference data
Parameter
Conditions
Min
collector-emitter voltage open base
-
collector current (DC)
[1] -
peak collector current
collector-emitter saturation resistance
t = 1 ms or limited by Tj(max)
IC = 6 A; IB = 600 mA
[2] -
Typ -
55
[1] Device mounted on a ceramic Printed-Circuit Board (PCB), AL2O3, standard footprint. [2] Pulse test: tp ≤ 300 μs; δ ≤ 0.02.
Max Unit 40 V 4A 15 A
75 mΩ
NXP Semiconductors
PBSS4440D
40 V NPN low VCEsat (BISS) transistor
2. Pinning information
Table 2. Pin 1 2 3 4 5 6
Pinning Description collector collector base emitter collector collector
Simplified outline Symbol
654 123
1, 2, 5, 6
3
4 sym014
3. Ordering information
Table 3. Ordering information
Type number
Package
Name
Description
PBSS4440D
SC-74
plastic surface mounted package; 6 leads
Version SOT457
4. Marking
Table 4. Marking codes Type number PBSS4440D
Marking code 61
5. Limiting values
Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
Conditions
Min
VCBO VCEO VEBO IC ICM
IB IBM Ptot
collector-base voltage collector-emitter voltage emitter-base voltage collector current (DC) peak collector current
base current (DC) peak base current total power dissipation
open emitter open base open collector
t = 1 ms or limited by Tj(max)
tp ≤ 300 μs Tamb ≤ 25 °C
[1] -
[2] [3] -
[4] -
[1] -
[2][5] -
Max Unit 60 V 40 V 5V 4A 15 A
0.8 A 2A 360 mW 600 mW 750 mW 1.1 W 2.5 W
PBSS4440D_2
Product data sheet
Rev. 02 — 11 December 2009
© NXP B.V. 2009. All rights reserved.
2 of 13
NXP Semiconductors
PBSS4440D
40 V NPN low VCEsat (BISS) transistor
Table 5. Limiting values …continued In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
Conditions
Min
Tstg storage temperature
−65
Tj Tamb
junction temperature ambient temperature
−65
Max +150 150 +150
Unit °C °C °C
[1] Device mounted on a ceramic PCB, AL2O3, standard footprint. [2] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. [3] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm2. [4] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 6 cm2. [5] Operated under pulsed conditions: Duty cycle δ ≤ 10% and pulse width tp ≤ 10 ms.
1600 Ptot (mW) 1200
800
400
(1)
(2) (3) (4)
006aaa270
0 −75 −25
25
75
(1) Ceramic PCB, AL2O3, standard footprint (2) FR4 PCB, mounting pad for collector 6 cm2 (3) FR4 PCB, mounting pad for collector 1 cm2 (4) FR4 PCB, standard footprint
Fig 1. Power derating curves
125 175 Tamb (°C)
PBSS4440D_2
Product data sheet
Rev. 02 — 11 December 2009
© NXP B.V. 2009. All rights reserved.
3 of 13
NXP Semiconductors
PBSS4440D
40 V NPN low VCEsat (BISS) transistor
6. Thermal characteristics
Table 6. Symbol Rth(j-a)
Thermal characteristics
Parameter
thermal resistance from junction to ambient
Conditions in free air
Rth(j-sp)
thermal resistance from junction to solder point
Min Typ Max Unit [1] - - 350 K/W
[2] - - 208 K/W [3] - - 160 K/W [4] - - 113 K/W [1][5] - - 50 K/W
- - 45 K/W
[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. [2] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm2. [3] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 6 cm2. [4] Device mounted on a ceramic PCB, AL2O3, standard footprint. [5] Operated under pulsed conditions: Duty cycle δ ≤ 10% and pulse width tp ≤ 10 ms.
103 Zth(j-a) (K/W)
102
10
duty cycle = 1 0.75 0.5 0.33 0.2
0.1
0.05
0.02 0.01
10
006aaa271
10−1 10−5
10−4
10−3
10−2
10−1
1
10 102 103 tp (s)
FR4 PCB, standard footprint
Fig 2. Transient thermal impedance from junction to ambient as a function of pulse time; typical values
PBSS4440D_2
Product data sheet
Rev. 02 — 11 December 2009
© NXP B.V. 2009. All rights reserved.
4 of 13
NXP Semiconductors
PBSS4440D
40 V NPN low VCEsat (BISS) transistor
103
Zth(j-a) (K/W)
102
10
duty cycle = 1 0.75 0.5 0.33 0.2
0.1
0.05
0.02 0.01 1
0
006aaa2.