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74HCT280 Dataheets PDF



Part Number 74HCT280
Manufacturers nexperia
Logo nexperia
Description 9-bit odd/even parity generator/checker
Datasheet 74HCT280 Datasheet74HCT280 Datasheet (PDF)

74HC280; 74HCT280 9-bit odd/even parity generator/checker Rev. 4 — 16 August 2021 Product data sheet 1. General description The 74HC280; 74HCT280 is a 9-bit parity generator or checker. Both even and odd parity outputs are available. The even parity output (PE) is HIGH when an even number of data inputs (I0 to I8) is HIGH. The odd parity output (PO) is HIGH when an odd number of data inputs are HIGH. Expansion to larger word sizes is accomplished by tying the even outputs (PE) of up to nine pa.

  74HCT280   74HCT280


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74HC280; 74HCT280 9-bit odd/even parity generator/checker Rev. 4 — 16 August 2021 Product data sheet 1. General description The 74HC280; 74HCT280 is a 9-bit parity generator or checker. Both even and odd parity outputs are available. The even parity output (PE) is HIGH when an even number of data inputs (I0 to I8) is HIGH. The odd parity output (PO) is HIGH when an odd number of data inputs are HIGH. Expansion to larger word sizes is accomplished by tying the even outputs (PE) of up to nine parallel devices to the final stage data inputs. Inputs include clamp diodes. It enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits • Word-length easily expanded by cascading • Generates either odd or even parity for nine data bits • Wide supply voltage range from 2.0 to 6.0 V • Input levels: • For 74HC280: CMOS level • For 74HCT280: TTL level • CMOS low power dissipation • High noise immunity • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B • Complies with JEDEC standards • JESD8C (2.7 V to 3.6 V) • JESD7A (2.0 V to 6.0 V) • ESD protection: • HBM JESD22-A114F exceeds 2000 V • MM JESD22-A115-A exceeds 200 V • Specified from -40 °C to +85 °C and -40 °C to +125 °C 3. Ordering information Table 1. Ordering information Type number Temperature range 74HC280D -40 °C to +125 °C 74HCT280D 74HCT280PW -40 °C to +125 °C Name SO14 TSSOP14 Description plastic small outline package; 14 leads; body width 3.9 mm plastic thin shrink small outline package; 14 leads; body width 4.4 mm Version SOT108-1 SOT402-1 Nexperia 4. Functional diagram Fig. 1. Logic symbol I0 I1 I2 I3 I4 I5 I6 I7 I8 Fig. 2. Logic diagram 74HC280; 74HCT280 9-bit odd/even parity generator/checker 8 I0 9 I1 10 I2 11 I3 12 I4 13 I5 1 I6 2 I7 4 I8 PE 5 PO 6 aaa-024423 PE PO aaa-024424 74HC_HCT280 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 16 August 2021 © Nexperia B.V. 2021. All rights reserved 2 / 13 Nexperia 5. Pinning information 74HC280; 74HCT280 9-bit odd/even parity generator/checker 5.1. Pinning 74HC280 74HCT280 I6 1 14 VCC I7 2 13 I5 n.c. 3 12 I4 I8 4 11 I3 PE 5 10 I2 PO 6 9 I1 GND 7 8 I0 aaa-024425 Fig. 3. Pin configuration SOT108-1 (SO14) 74HCT280 I6 1 I7 2 n.c. 3 I8 4 PE 5 PO 6 GND 7 14 VCC 13 I5 12 I4 11 I3 10 I2 9 I1 8 I0 aaa-024426 Fig. 4. Pin configuration SOT402-1 (TSSOP14) 5.2. Pin description Table 2. Pin description Symbol I0, I1, I2, I3, I4, I5, I6, I7, I8 GND PE PO VCC Pin 8, 9, 10, 11, 12, 13, 1, 2, 4 7 5 6 14 6. Functional description Table 3. Function table H = HIGH voltage level; L = LOW voltage level Inputs Outputs number of HIGH data inputs (I0 to I8) PE even H odd L Description data input ground (0 V) even parity output odd parity output supply voltage PO L H 74HC_HCT280 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 16 August 2021 © Nexperia B.V. 2021. All rights reserved 3 / 13 Nexperia 74HC280; 74HCT280 9-bit odd/even parity generator/checker 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit VCC IIK IOK IO ICC IGND Tstg Ptot supply voltage input clamping current output clamping current output current supply current ground current storage temperature total power dissipation VI < -0.5 V or VI > VCC + 0.5 V VO < -0.5 V or VO > VCC + 0.5 V -0.5 V < VO < VCC + 0.5 V -0.5 [1] [1] - -50 -65 [2] - +7 V ±20 mA ±20 mA ±25 mA 50 mA - mA +150 °C 500 mW [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] For SOT108-1 (SO14) package: Ptot derates linearly with 10.1 mW/K above 100 °C. For SOT402-1 (TSSOP14) package: Ptot derates linearly with 7.3 mW/K above 81 °C. 8. Recommended operating conditions Table 5. Recommended operating conditions Voltages are referenced to GND (ground = 0 V) Symbol Parameter Conditions VCC VI VO Tamb Δt/ΔV supply voltage input voltage output voltage ambient temperature input transition rise and fall rate VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V 74HC280 Min Typ Max 2.0 5.0 6.0 0 - VCC 0 - VCC -40 +25 +125 - - 625 - 1.67 139 - - 83 74HCT280 Min Typ Max 4.5 5.0 5.5 0 - VCC 0 - VCC -40 +25 +125 - - - - 1.67 139 - - - Unit V V V °C ns/V ns/V ns/V 74HC_HCT280 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 16 August 2021 © Nexperia B.V. 2021. All rights reserved 4 / 13 Nexperia 74HC280; 74HCT280 9-bit odd/even parity generator/checker 9. Static characteristics Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Paramete.


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